MAX6420 MAXIM [Maxim Integrated Products], MAX6420 Datasheet - Page 8

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MAX6420

Manufacturer Part Number
MAX6420
Description
Low-Power, Single/Dual-Voltage ?P Reset Circuits with Capacitor-Adjustable Reset Timeout Delay
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

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The reset delay time is set by a current/capacitor-con-
trolled ramp compared to an internal 0.65V reference.
An internal 240nA ramp current source charges the
external capacitor. The charge to the capacitor is
cleared when a reset condition is detected. Once the
reset condition is removed, the voltage on the capacitor
ramps according to the formula: dV/dt = I/C. The C
capacitor must ramp to 0.65V to deassert the reset.
C
ceramic is recommended.
The MAX6412–MAX6420 can be operated in a voltage
detector mode by leaving SRT unconnected. The reset
delay times for V
threshold are not significantly different. The reset output
is deasserted smoothly without false pulses.
The open-drain outputs of the MAX6414/MAX6417/
MAX6420 can be used to interface to µPs with other
logic levels. As shown in Figure 5, the open-drain out-
put can be connected to voltages from 0 to 5.5V. This
allows for easy logic compatibility to various micro-
processors.
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervisors
are relatively immune to short-duration negative-going
transients (glitches). The Maximum Transient Duration vs.
Low-Power, Single/Dual-Voltage µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Figure 5. MAX6414/MAX6417/MAX6420 Open-Drain RESET
Output Allows use with Multiple Supplies
8
SRT
_______________________________________________________________________________________
Interfacing to Other Voltages for Logic
must be a low-leakage (<10nA) type capacitor,
MAX6414
MAX6417
MAX6420
Operating as a Voltage Detector
Negative-Going V
3.3V
V
CC
CC
GND
rising above or falling below the
RESET
10kΩ
CC
Compatibility
Transients
5V SYSTEM
5.0V
SRT
Reset Threshold Overdrive graph in the Typical
Operating Characteristics shows this relationship.
The area below the curve of the graph is the region in
which these devices typically do not generate a reset
pulse. This graph was generated using a negative-
going pulse applied to V
reset threshold (V
tude indicated (reset-threshold overdrive). As the mag-
nitude of the transient decreases (farther below the
reset threshold), the maximum allowable pulse width
decreases. Typically, a V
below the reset threshold and lasts 50µs or less will not
cause a reset pulse to be issued.
Figure 6. Ensuring RESET Valid to V
Figure 7. Ensuring RESET Valid to V
Ensuring a Valid RESET or RESET
TH
MAX6412
MAX6415
MAX6418
MAX6413
MAX6416
MAX6419
) and ending below it by the magni-
GND
GND
CC
CC
RESET
, starting above the actual
transient that goes 100mV
RESET
V
CC
V
CC
CC
CC
Down to V
= 0V
= 0V
V
CC
V
CC
100kΩ
100kΩ
CC
= 0V

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