AD9480-LVDS-PCB3 AD [Analog Devices], AD9480-LVDS-PCB3 Datasheet - Page 16

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AD9480-LVDS-PCB3

Manufacturer Part Number
AD9480-LVDS-PCB3
Description
8-Bit, 250 MSPS 3.3 V A/D Converter
Manufacturer
AD [Analog Devices]
Datasheet
AD9480
Figure 27. SFDR vs. A
–10
–20
–30
–40
–50
–60
–70
–80
–90
75
70
65
60
55
50
45
40
80
70
60
50
40
30
20
10
Figure 26. SNR, SINAD, SFDR vs. Sample Clock Frequency,
0
0
–70
0
0
SFDRdBFS
SFDRdBc
Figure 28. Two-Tone Intermodulation Distortion
F1, F2 = –7dBFS
2F2-F1 = –71.1dBc
2F1-F2 = –68dBc
SINAD
SNR
(69.3 MHz and 70.3 MHz; f
–60
20
50
SFDR
ANALOG INPUT DRIVE LEVEL (dBFS)
65dB
REF LINE
A
–50
IN
IN
100
40
= 70 MHz −1 dBFS
Input Level; A
SAMPLE CLOCK (MHz)
–40
60
MHz
150
–30
IN
S
= 250 MSPS)
= 70 MHz at 250 MSPS
80
200
–20
100
250
–10
120
300
0
Rev. 0 | Page 16 of 28
Figure 31. SNR, SINAD, and SFDR vs. VREF in External Reference Mode,
50.0
47.5
45.0
42.5
40.0
0.5
180
160
140
120
100
80
60
40
20
50
49
48
47
46
45
44
43
42
41
40
0
20
0
Figure 29. I
Figure 30. SNR, SINAD vs. Clock Pulse Width High,
A
0.7
IN
= 70 MHz @ –1 dBFS, 250 MSPS, DCS On/Off
DCS ON
A
50
30
IN
AVDD
0.9
EXTERNAL VREF VOLTAGE (V)
= 70 MHz @ –1 dBFS, 250 MSPS
I
CLOCK POSITIVE DUTY CYCLE (%)
AVDD
A
and I
IN
= 70 MHz @ –1 dBFS
100
40
1.1
DRVDD
ENCODE (MSPS)
DCS OFF
vs. Clock Rate, C
1.3
SFDR
150
50
I
DRVDD
1.5
200
60
LOAD
1.7
SNR
= 5 pF
250
SINAD
70
1.9
80
75
70
65
50
300
80

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