MAX5722AUA MAXIM [Maxim Integrated Products], MAX5722AUA Datasheet - Page 10

• Manufacturer Part Number: MAX5722AUA
• Description: 12-Bit, Low-Power, Dual, Voltage-Output DAC with Serial Interface
• Manufacturer: MAXIM [Maxim Integrated Products]

12-Bit, Low-Power, Dual, Voltage-Output
DAC with Serial Interface
Table 1. Power-Down Mode Control
keeping CS low during the first 15 SCLK cycles dis-
cards input data. The serial clock (SCLK) can idle
either high or low between transitions.
The MAX5722 has two internal registers per DAC, the
input register and the DAC register. The input register
holds the data that is waiting to be shifted to the DAC
register. Both input registers can be loaded without
updating the output. This function is useful when both
outputs need to be updated at the same time. The input
register can be made transparent. When the input reg-
ister is transparent, the data written into DIN loads
directly to the DAC register and the output is updated.
The DAC output is not updated until data is written to
the DAC register. See Table 2 for a list of serial-inter-
face programming commands.
The MAX5722 has an internal POR circuit. At power-up,
all DACs are powered-down and OUT_ is terminated to
GND through 100k
DAC registers are cleared to all zero. An 8µs recovery
time after issuing a wake-up command is needed
before writing to the DAC registers. Power-down mode
control commands can be applied immediately with no
recovery time.
C3-C0 are control bits. The data bits D11 to D0 are in
straight binary format. All zeros correspond to zero
scale and all ones correspond to full scale.
10
X = Don’t Care
C3
1
1
1
1
1
1
1
1
1
1
1
1
EXTENDED
______________________________________________________________________________________
CONTROL
C2
1
1
1
1
1
1
1
1
1
1
1
1
C1
1
1
1
1
1
1
1
1
1
1
1
1
C0
1
1
1
1
1
1
1
1
1
1
1
1
D11–D5
resistors. Contents of input and
X
X
X
X
X
X
X
X
X
X
X
X
Power-On Reset (POR)
D4
0
0
0
0
0
0
0
0
1
1
1
1
DATA BITS
D3
X
X
X
X
X
X
X
X
X
X
X
X
D2
0
0
0
0
1
1
1
1
0
0
0
0
D1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
The digital inputs are compatible with CMOS logic. In
order to save power and reduce input to output cou-
pling, SCLK and DIN input buffers are powered down
immediately after completion of shifting 16 bits into the
input shift register. A high to low transition at CS pow-
ers up SCLK and DIN input buffers.
The typical application circuit (Figure 3) shows the
MAX5722 configured for a unipolar output, where the
output voltages and the reference inputs have the
same polarity. Table 3 lists the unipolar output codes.
The MAX5722 can be configured for bipolar operation
using a dual supply op amp (Figure 4). The transfer
function for bipolar operation is:
where D is the decimal value of the DACs binary input
code. Table 4 shows digital codes (offset binary) and
corresponding output voltages for the circuit in Figure 4.
DESCRIPTION
DAC A-B
DAC A-B
DAC A-B
DAC A-B
DAC A
DAC A
DAC A
DAC A
DAC B
DAC B
DAC B
DAC B
V
OUT
Applications Information
DAC O/P, wake-up
Floating output
Output is terminated with 1k
Output is terminated with 100k
DAC O/P, wake-up
Floating output
Output is terminated with 1k
Output is terminated with 100k
DAC O/P, wake-up
Floating output
Output is terminated with 1k
Output is terminated with 100k
V
REF
FUNCTION
4096
2
D
Unipolar Output
Bipolar Output
Digital Inputs
1