MC14012BDG ON Semiconductor, MC14012BDG Datasheet - Page 6
![IC GATE NAND DUAL P/N 14-SOIC](/photos/6/57/65767/14-soic_751a_sml.jpg)
MC14012BDG
Manufacturer Part Number
MC14012BDG
Description
IC GATE NAND DUAL P/N 14-SOIC
Manufacturer
ON Semiconductor
Series
4000Br
Datasheet
1.MC14012BCPG.pdf
(9 pages)
Specifications of MC14012BDG
Logic Type
NAND Gate
Number Of Inputs
4
Number Of Circuits
2
Current - Output High, Low
3.4mA, 3.4mA
Voltage - Supply
3 V ~ 18 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Output Current
8.8mA
No. Of Inputs
4
Supply Voltage Range
3V To 18V
Logic Case Style
SOIC
No. Of Pins
14
Operating Temperature Range
-55°C To +125°C
Termination Type
SMD
Rohs Compliant
Yes
Filter Terminals
SMD
Family Type
CD4000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC14012BDG
Manufacturer:
ON Semiconductor
Quantity:
1 976
Company:
Part Number:
MC14012BDG
Manufacturer:
DELTA
Quantity:
200
3.0
1.0
5.0
4.0
2.0
8.0
6.0
2.0
4.0
16
10
14
12
0
0
0
0
1.0
2.0
Figure 13. V
V
2.0
4.0
V
in
Figure 11. V
in
, INPUT VOLTAGE (Vdc)
, INPUT VOLTAGE (Vdc)
V
V
V
out
O
O
3.0
6.0
0
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
(a) Inverting Function
V
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, AND
DD
4.0
DD
8.0
DD
= 15 Vdc
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
V
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, A
IL
= 5.0 Vdc
5.0
10
VOLTAGE TRANSFER CHARACTERISTICS
V
Figure 14. DC Noise Immunity
IH
http://onsemi.com
V
V
V
DD
in
SS
MC14012B
= 0 VOLTS DC
6
from an ideal “1” or “0” input level which does not produce
output state change(s). The typical and guaranteed limit
values of the input values V
be at a fixed voltage V
Characteristics table. V
in Figure 11.
“0” levels =
The DC noise margin is defined as the input voltage range
Guaranteed minimum noise margins for both the “1” and
2.0
V
8.0
6.0
4.0
V
V
10
O
0
O
out
0
(b) Non-Inverting Function
0
1.0 V with a 5.0 V supply
2.0 V with a 10.0 V supply
2.5 V with a 15.0 V supply
V
2.0
DD
V
IL
4.0
Figure 12. V
DC NOISE MARGIN
V
in
, INPUT VOLTAGE (Vdc)
IL
6.0
and V
V
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
O
IH
IL
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, AND
are given in the Electrical
8.0
and V
IH
DD
are presented graphically
V
V
= 10 Vdc
DD
in
10
IH
for the output(s) to