MAX5974A MAXIM [Maxim Integrated Products], MAX5974A Datasheet - Page 20

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MAX5974A

Manufacturer Part Number
MAX5974A
Description
Active-Clamped, Spread-Spectrum, Current-Mode PWM Controllers
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

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0
Using an external clock increases the maximum duty
cycle by a factor equal to f
be accounted for in setting the maximum duty cycle
using any of the methods described in the Duty-Cycle
Clamping section. The formula below shows how the
maximum duty cycle is affected by the external clock
frequency:
where V
section, f
resistor connected between RT and GND, and f
the external clock frequency.
The switching frequency of the converter can be dith-
ered in a range of Q10% by connecting a capacitor from
DITHER/SYNC to GND, and a resistor from DITHER to RT
as shown in the Typical Application Circuits. This results
in lower EMI.
A current source at DITHER/SYNC charges the capaci-
tor C
it discharges C
and discharging of the capacitor generates a triangular
waveform on DITHER/SYNC with peak levels at 0.4V and
2V and a frequency that is equal to:
Typically, f
R
mines the amount of dither as follows:
where %DITHER is the amount of dither expressed as a
percentage of the switching frequency. Setting R
to 10 x R
The device generates a current ramp at CSSC such that
its peak is 50FA at 80% duty cycle of the oscillator. An
external resistor connected from CSSC to the CS then
converts this current ramp into programmable slope-
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
20
DITHER
DITHER
MIN
RT
SW
connected from DITHER/SYNC to RT deter-
Programmable Slope Compensation
TRI
generates Q10% dither.
to 2V at 50FA. Upon reaching this trip point,
is described in the Duty-Cycle Clamping
Spectrum Applications (Low EMI)
is the switching frequency as set by the
should be set close to 1kHz. The resistor
Frequency Dithering for Spread-
%DITHER
DITHER
D
f
TRI
MAX
=
=
C
to 0.4V at 50FA. The charging
DITHER
2.43V
V
=
MIN
SYNC
4
3 R
50 A
×
µ
×
/f
×
DITHER
f
R
SW
SYNC
3.2V
f
SW
RT
. This factor should
SYNC
DITHER
is
compensation amplitude, which is added to the current-
sense signal for stability of the peak current-mode
control loop. The ramp rate of the slope compensation
signal is given by:
where m is the ramp rate of the slope-compensation
signal, R
between CSSC and CS used to program the ramp rate,
and f
The MAX5974A/MAX5974B include an internal error
amplifier with a sample-and-hold input. The feedback
input of the MAX5974C/MAX5974D is continuously con-
nected. The noninverting input of the error amplifier is
connected to the internal reference and feedback is
provided at the inverting input. High open-loop gain and
unity-gain bandwidth allow good closed-loop bandwidth
and transient response. Calculate the power-supply out-
put voltage using the following equation:
where V
and V
amplifier’s noninverting input is internally connected to
a soft-start circuit that gradually increases the reference
voltage during startup. This forces the output voltage to
come up in an orderly and well-defined manner under all
load conditions.
The bypass capacitor at IN, C
immediately after the devices wake up (see the Typical
Application Circuits). Large values of C
the startup time, but also supply gate charge for more
cycles during initial startup. If the value of C
small, V
enough time to switch and build up sufficient voltage
across the tertiary output (MAX5974C/MAX5974D) or
coupled inductor output (MAX5974A/MAX5974B), which
powers the device. The device goes back into UVLO
and does not start. Use a low-leakage capacitor for C
SW
REF
IN
is the switching frequency.
REF
CSSC
drops below 7V because NDRV does not have
= 1.215V for the MAX5974C/MAX5974D. The
V
= 1.52V for the MAX5974A/MAX5974B
OUT
m
is the value of the resistor connected
Applications Information
=
Startup Time Considerations
R
=
CSSC
V
REF
×
×
80%
50 A f
R
FB1
µ ×
R
FB2
+
IN
R
SW
, supplies current
Error Amplifier
FB2
IN
IN
increase
is too
IN
.

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