MAX6871 MAXIM [Maxim Integrated Products], MAX6871 Datasheet
MAX6871
Related parts for MAX6871
MAX6871 Summary of contents
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... EEPROM, the configuration registers, the internal 4kb user EEPROM, the ADC registers, and the fault registers of the MAX6870/MAX6871. The MAX6870/MAX6871 are available in a 7mm x 7mm x 0.8mm 32-pin thin QFN package and operate over the extended -40°C to +85°C temperature range. Telecommunications/Central Office Systems ...
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... All Voltages referenced to GND IN3–IN6, ABP, SDA, SCL, A0, A1, GPI1–GPI4, MR, MARGIN, PO5–PO8 (MAX6870), PO3/PO4/PO5 (MAX6871)............-0.3V to +6V IN1, PO1–PO4 (MAX6870), PO1/PO2 (MAX6871)....-0.3V to +14V IN2 ...........................................................................-20V to +20V DBP, AUXIN1, AUXIN2, REFIN.................................-0.3V to +3V Input/Output Current (all pins)..........................................±20mA Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied ...
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... IN3 to IN6 Input Impedance Power-Up Delay IN_ to PO_ Delay PO_ Timeout Period PO1–PO4 (MAX6870), PO1/PO2 (MAX6871) Output Low (Note 3) P O5– 6870 3/P O4 6871) O utp ut Low ( N ote 3) PO1–PO8 Output Initial Pulldown Current PO1–PO8 Output Open-Drain Leakage Current PO1– ...
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EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC ELECTRICAL CHARACTERISTICS (continued +6.5V to +13.2V +10V, V IN1 IN2 +85°C, unless otherwise noted. Typical values are at T PARAMETER SYM MR, MARGIN, GPI_ Input Voltage ...
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Power-Supply Sequencers/Supervisors with ADC TIMING CHARACTERISTICS (IN1 = GND +10V IN2 IN3 IN6 unless otherwise noted. Typical values are at T PARAMETER TIMING CHARACTERISTICS (Figure 2) Serial Clock Frequency Clock Low Period Clock High Period ...
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... TEMPERATURE (°C) OUTPUT VOLTAGE LOW vs. SINK CURRENT OPEN-DRAIN, CHARGE PUMP, OR WEAK PULLUP PO1–PO4 (MAX6870) PO1/PO2 (MAX6871) PUSH-PULL PO5–PO8 (MAX6870) PO3/PO4/PO5 (MAX6871 (mA) SINK W & & & & ...
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... I (mA) OUT 5V AUXIN1 60 85 OUTPUT VOLTAGE HIGH vs. SOURCE CURRENT (CHARGE-PUMP OUTPUT) 6.0 MEASURED RELATIVE TO V 5.5 5.0 PO1–PO4 (MAX6870) PO1/PO2 (MAX6871) 4.5 4.0 3.5 3 SOURCE CURRENT (µA) MAXIMUM MR TRANSIENT DURATION vs. MR THRESHOLD OVERDRIVE 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 PO_ ASSERTION OCCURS ABOVE THIS LINE 0 ...
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... Address Input 0. Address inputs allow up to four MAX6870/MAX6871 connections on one common bus. Connect A0 to GND or to the serial interface power supply. Address Input 1. Address inputs allow up to four MAX6870/MAX6871 connections on one common bus. Connect A1 to GND or to the serial interface power supply. ...
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... GPI1 GPI1 to control watchdog timer functions or the programmable outputs. Internal Power-Supply Output. Bypass ABP to GND with a 1µF ceramic capacitor. ABP powers the internal circuitry of the MAX6870/MAX6871. ABP supplies the input voltage to the internal 21 21 ABP charge pumps when the programmable outputs are configured as charge-pump outputs. Do not use ABP to supply power to external circuitry. Internal Digital Power-Supply Output. Bypass DBP to GND with a 1µ ...
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... For improved noise immunity, bypass IN1 to GND with a 0.1µF capacitor installed as close to the device as possible. Reference Voltage Input. Configure the MAX6870/MAX6871 to use either an internal reference or external reference (see Table 9). When configured for an internal reference, leave REFIN ...
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... GPI_ inputs only, or one of the programmable outputs only. The initial and normal watchdog timeout periods are independently programmable from 6.25ms to 102.4s. A virtual diode-ORing scheme selects the input that pow- ers the MAX6870/MAX6871. The MAX6870/MAX6871 IN_ ADC MUX AUXIN_ ...
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... IN6 AUXIN1 AUXIN2 SDA SCL SERIAL INTERFACE ARE FOR MAX6871 ONLY & & & & & ...
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... Active high or active low Programmable Outputs Open-drain, weak pullup, or push-pull output PO5–PO8 (MAX6870), Weak pullup to IN3–IN6 (IN3 or IN4 for MAX6871) or ABP PO3, PO4, PO5 Push-pull to IN3–IN6 (IN3 or IN4 for MAX6871) Dependent on MR, MARGIN, IN_, GPI1–GPI4 , WDI1 and WDI2 , and/or IN_ (MAX6871) Programmable timeout periods of 25µ ...
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EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC Table 1. Programmable Features (continued) FEATURE General-Purpose Logic Active high or active low logic levels Inputs (GPI1–GPI4) Configure GPI_ as inputs to watchdog timers or programmable output stages Clear dependent on any combination of ...
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Power-Supply Sequencers/Supervisors with ADC ( ) − − for − − − for 1 ...
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EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC Table 4. IN3–IN6 Threshold Settings EEPROM REGISTER BIT MEMORY ADDRESS RANGE ADDRESS 02h 8002h [7:0] 03h 8003h [7:0] 04h 8004h [7:0] 05h 8005h [7:0] 08h 8008h [7:0] 09h 8009h [7:0] 0Ah 800Ah [7:0] 0Bh ...
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... PO5 (MAX6870)/PO3 (MAX6871 PO5/PO3 independent of MR PO5/PO3 asserts when MR = low. PO6 (MAX6870)/PO4 (MAX6871 PO6/PO4 independent of MR PO6/PO4 asserts when MR = low. PO7 (MAX6870)/PO5 (MAX6871 PO7/PO5 independent of MR PO7/PO5 asserts when MR = low. PO8 (MAX6870 only PO8 independent of MR PO8 asserts when MR = low. GPI1–GPI4 ...
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... PO3 (MAX6870 output asserts low if 41h[ PO1 (MAX6871 output asserts high if 41h[ PO4 (MAX6870 output asserts low if 41h[ PO2 (MAX6871 output asserts high if 41h[ PO5 (MAX6870 output asserts low if 41h[ PO3 (MAX6871 output asserts high if 41h[ PO6 (MAX6870 output asserts low if 41h[ ...
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... Each product allows a differ- ent set of conditions to assert each output. Outputs PO3 (MAX6870)/PO1 (MAX6871) and PO6 (MAX6870)/ DESCRIPTION PO4 (MAX6871) allow two sets of different conditions to assert each output. Outputs PO1 and PO2 (MAX6870 only), PO7 (MAX6870)/PO5 (MAX6871), and PO8 0 = internal reference. ...
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EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC Table 10. PO1 (MAX6870 Only) Output Dependency EEPROM REGISTER MEMORY BIT ADDRESS ADDRESS [0] [1] [2] [3] 0Eh 800Eh [4] [5] [6] [7] [0] [1] [2] [3] 0Fh 800Fh [4] [5] [6] [7] [0] ...
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Power-Supply Sequencers/Supervisors with ADC Table 11. PO2 (MAX6870 Only) Output Dependency EEPROM REGISTER MEMORY BIT ADDRESS ADDRESS [0] [1] [2] [3] 12h 8012h [4] [5] [6] [7] [0] [1] [2] [3] 13h 8013h [4] [5] [6] [7] [0] [1] [2] ...
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... PO3/PO1 assertion depends on PO4 (MAX6870)/PO2 (MAX6871) (Tables 14 and 15 asser end 6870 6871) ( Tab and 17 PO3/PO1 assertion depends on PO6 (MAX6870)/PO4 (MAX6871) (Tables 18 and 19). [ PO3/PO1 assertion depends on PO7 (MAX6870)/PO5 (MAX6871) (Table 20). 1Ch ...
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... Table 13 only applies to PO3 of the MAX6870 and PO1 of the MAX6871. Write bit to make the PO3/PO1 output independent of the respective signal (IN_ primary or secondary thresholds, WDI1 or WDI2, GPI1–GPI4 ...
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... PO4/PO2 asserts when MR = low (Table 7). 40h 8040h [3] Table 14 only applies to PO4 of the MAX6870 and PO2 of the MAX6871. Write bit to make the PO4/PO2 output independent of the respective signal (IN_ primary or secondary thresholds, WDI1 or WDI2, GPI1–GPI4, 24 ______________________________________________________________________________________ OUTPUT ASSERTION CONDITIONS MR, or other programmable outputs) ...
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... PO4/PO2 assertion depends on PO3 (MAX6870)/PO1 (MAX6871) (Tables 12 and 13). [ PO4/PO2 assertion depends on PO5 (MAX6870)/PO3 (MAX6871) (Tables 16 and 17). [ PO4/PO2 assertion depends on PO6 (MAX6870)/PO4 (MAX6871) (Tables 18 and 19). [ PO4/PO2 assertion depends on PO7 (MAX6870)/PO5 (MAX6871) (Table 20). 23h 8023h [ 6870 onl y) asser end Tab l e 21) ...
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... PO5/PO3 assertion depends on PO3 (MAX6870)/PO1 (MAX6871) (Tables 12 and 13). [ PO5/PO3 assertion depends on PO4 (MAX6870)/PO2 (MAX6871) (Tables 14 and 15). [ PO5/PO3 assertion depends on PO6 (MAX6870)/PO4 (MAX6871) (Tables 18 and 19). [ PO5/PO3 assertion depends on PO7 (MAX6870)/PO5 (MAX6871) (Table 20). 2Ah 802Ah [ 6870 onl y) asser end Tab l e 21) ...
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... PO5/PO3 assertion depends on PO3 (MAX6870)/PO1 (MAX6871) (Tables 12 and 13). [ PO5/PO3 assertion depends on PO4 (MAX6870)/PO2 (MAX6871) (Tables 14 and 15). [ PO5/PO3 assertion depends on PO6 (MAX6870)/PO4 (MAX6871) (Tables 18 and 19). [ PO5/PO3 assertion depends on PO7 (MAX6870)/PO5 (MAX6871) (Table 20). 3Bh 803Bh [ 6870 onl y) asser end Tab l e 21) ...
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... PO6/PO4 assertion depends on PO3 (MAX6870)/PO1 (MAX6871) (Tables 12 and 13). [ PO6/PO4 assertion depends on PO4 (MAX6870)/PO2 (MAX6871) (Tables 14 and 15). [ PO6/PO4 assertion depends on PO5 (MAX6870)/PO3 (MAX6871) (Tables 16 and 17). [ PO6/PO4 assertion depends on PO7 (MAX6870)/PO5 (MAX6871) (Table 20). 31h 8031h [ 6870 onl y) asser end Tab l e 21) ...
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... PO6/PO4 assertion depends on PO3 (MAX6870)/PO1 (MAX6871) (Tables 12 and 13). [ PO6/PO4 assertion depends on PO4 (MAX6870)/PO2 (MAX6871) (Tables 14 and 15). [ PO6/PO4 assertion depends on PO5 (MAX6870)/PO3 (MAX6871) (Tables 16 and 17). [ PO6/PO4 assertion depends on PO7 (MAX6870)/PO5 (MAX6871) (Table 20). 3Bh 803Bh [ 6870 onl y) asser end Tab l e 21) ...
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... PO7/PO5 assertion depends on PO3 (MAX6870)/PO1 (MAX6871) (Tables 12 and 13). [ PO7/PO5 assertion depends on PO4 (MAX6870)/PO2 (MAX6871) (Tables 14 and 15). [ PO7/PO5 assertion depends on PO5 (MAX6870)/PO3 (MAX6871) (Tables 16 and 17). [ PO7/PO5 assertion depends on PO6 (MAX6870)/PO4 (MAX6871) (Tables 18 and 19). ...
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... Every programmable output can be configured as open-drain or weak pullup; however, only PO1–PO4 (MAX6870) or PO1/PO2 (MAX6871) can be configured ...
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... PO2 (MAX6870 only active-low active-high. PO3 (MAX6870)/PO1 (MAX6871 active-low active-high. PO4 (MAX6870)/PO2 (MAX6871 active-low active-high. PO5 (MAX6870)/PO3 (MAX6871 active-low active-high. PO6 (MAX6870)/PO4 (MAX6871 active-low active-high. PO7 (MAX6870)/PO5 (MAX6871 active-low active-high. PO8 (MAX6870 only active-low active-high. AFFECTED ...
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... FFh. Each device requires configuration before full power is ABP applied to the system. To configure the MAX6870/ MAX6871, first apply an input voltage to IN1 or one of IN3–IN6 (MAX6870)/IN3/IN4 (MAX6871) (see the Powering the MAX6870/MAX6871 section one of V Next, transmit data through the serial interface ...
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... SCL to permit that transfer. A master device communicates to the MAX6870/ MAX6871 by transmitting the proper address followed by command and/or data words. Each transmit sequence is framed by a START (S) or REPEATED START (SR) condi- tion and a STOP (P) condition. Each word transmitted over the bus is 8 bits long and is always followed by an acknowledge pulse ...
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... The MAX6870/MAX6871 generate a NACK after the slave address during a software reboot, while writing to the EEPROM, or when receiving an illegal memory address devices The MAX6870/MAX6871 slave address conforms to the following table: SA7 SA6 (MSB) 1 Acknowledge X = Don’ ...
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... MAX6870/MAX6871 (hard-wired as logic-low or logic- high). SA0 is a read/write flag bit (0 = write read). The A0 and A1 address inputs allow up to four MAX6870/MAX6871 devices to connect to one bus. Connect A0 and A1 to GND or to the serial interface power supply (see Figure 6). The send byte protocol allows the master device to send one byte of data to the slave device (see Figure 7) ...
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Power-Supply Sequencers/Supervisors with ADC SEND BYTE FORMAT S ADDRESS WR ACK DATA ACK 7 bits 0 8 bits Slave Address– Data Byte–presets the equivalent to chip- internal address pointer. select line wire interface. RECEIVE BYTE FORMAT S ...
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... For the con- figuration registers, valid address pointers range from 00h to 45h. Register addresses outside of this range result in a NACK being issued from the MAX6870/ MAX6871. When using the block write protocol, the Block Read Address Pointers ...
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... Configuration EEPROM The configuration EEPROM addresses range from 8000h to 8045h. Write data to the configuration EEPROM to automatically set up the MAX6870/MAX6871 upon power- up. Data transfers from the configuration EEPROM to the configuration registers when ABP exceeds UVLO during power-up or after a software reboot. After ABP exceeds UVLO, an internal 1MHz clock starts after a 5µ ...
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... PO3 (MAX6870)/PO1 (MAX6871) input selection—Product 2 (Table 13). PO3 (MAX6870)/PO1 (MAX6871) input selection—Product 2 (Table 13). PO3 (MAX6870)/PO1 (MAX6871) input selection—Products 1 and 2, PO_ timeout period, and output type selection (Tables 12, 13, 23, 24, and 25). PO4 (MAX6870)/PO2 (MAX6871) input selection—Product 1 (Table 14). ...
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... PO7 (MAX6870)/PO5 (MAX6871) input selection (Table 20). PO7 (MAX6870)/PO5 (MAX6871) input selection (Table 20). PO7 (MAX6870)/PO5 (MAX6871) input selection (Table 20). PO7 (MAX6870)/PO5 (MAX6871) input selection, PO_ timeout period, and output type selection (Tables 20, 23, 24, and 25). PO8 (MAX6870 only) input selection (Table 21). ...
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EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC Table 26. Register Map (continued) EEPROM REGISTER READ/ MEMORY ADDRESS WRITE ADDRESS 50h — R 51h — R 52h — R 53h — R 54h — R 55h — R 56h — R 57h ...
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... Registers 3Ch–3Fh configure the watchdog functionality of the MAX6870/MAX6871. Program each watchdog timer to assert one or more programmable outputs (see Tables 10–21). Program each watchdog timer to reset on one of the GPI_ inputs, one of the programmable out- puts combination of one GPI_ input and one pro- grammable output ...
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... The user EEPROM write disable function (see Table 31) ensures that unintentional data does not corrupt the MAX6870/MAX6871 EEPROM data. Write Disable ...
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... PO7 (MAX6870)/PO5 (MAX6871) asserts write disabled if PO7 (MAX6870)/PO5 (MAX6871) asserts write not disabled if PO8 asserts (MAX6870 write disabled if PO8 asserts (MAX6870). Set to 0 (MAX6871). 1) Programmable outputs go high impedance with no power applied to the device. 2) When ABP exceeds +1V, all programmable out- puts are weakly pulled to GND through a 10µ ...
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... Connect a general purpose output from a µC to one of the GPI_ inputs to allow interrupts to assert any output of the MAX6870/MAX6871. Configure one of the pro- grammable outputs to assert on whichever GPI_ input connects to the general purpose output of the µC. ...
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... & & & EEPROM-Programmable Hex/Quad Use AUXIN_ to monitor any voltage up to 1.25V. The internal ADC of the MAX6870/MAX6871 digitizes the volt- age and stores the results in read-only registers 5Ch and logic outputs on through 5Fh ...
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... GPI4 N.C. 8 (7mm x 7mm Thin QFN) GENERAL-PURPOSE INTERNAL ADC INPUTS 4 4 Pin Configurations 24 AUXIN1 23 AUXIN2 22 DBP 21 ABP MAX6871 20 GPI1 19 GPI2 18 GPI3 *EXPOSED PADDLE 17 GPI4 Selector Guide PROGRAMMABLE AUXILIARY OUTPUTS INPUTS ...
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Power-Supply Sequencers/Supervisors with ADC +12V DC-DC 1 DC-DC 2 IN1 PO1 IN3 PO2 IN4 MARGIN MR ABP MAX6870 DBP AUXIN1 AUXIN2 REFIN TEMP SENSOR +12V BUS INPUT +12V SUPPLY t ENABLE +5V DC-DC CONVERTER PO1 PO1 +5V OUTPUT +5V SUPPLY ...
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EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) 50 ______________________________________________________________________________________ Package Information ...
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Power-Supply Sequencers/Supervisors with ADC (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely ...