MAX6872 MAXIM [Maxim Integrated Products], MAX6872 Datasheet
MAX6872
Related parts for MAX6872
MAX6872 Summary of contents
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... EEPROM, the configuration registers, the internal 4kb user EEPROM, and the fault registers of the MAX6872/MAX6873. The MAX6872/MAX6873 are available in a 7mm x 7mm x 0.8mm 32-pin thin QFN package and operate over the extended -40°C to +85°C temperature range. Telecommunications/Central Office Systems ...
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... GND.) IN3–IN6, ABP, SDA, SCL, A0, A1, GPI1–GPI4, MR, MARGIN, PO5–PO8 (MAX6872), PO3–PO5 (MAX6873)...................-0.3V to +6V IN1, PO1–PO4 (MAX6872), PO1–PO2 (MAX6873)...-0.3V to +14V IN2 ...........................................................................-20V to +20V DBP ..........................................................................-0.3V to +3V Input/Output Current (all pins)..........................................±20mA Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied ...
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... PO1–PO4 (MAX6872), PO1–PO2 (MAX6873) Turn-On Time, Charge Pump Selected (Note 4) PO1–PO4 (MAX6872), PO1–PO2 (MAX6873) Turn-Off Time, Charge Pump Selected PO1–PO4 (MAX6872), PO1–PO2 (MAX6873) Output High, Charge V Pump Selected (Notes 3, 4) PO5–PO8 (MAX6872), PO3–PO5 (MAX6873) Output High, ...
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EEPROM-Programmable, Hex/Quad, Power-Supply Sequencers/Supervisors ELECTRICAL CHARACTERISTICS (continued +6.5V to +13.2V +10V, V IN1 IN2 otherwise noted. Typical values are PARAMETER SYM MR, MARGIN, GPI_ Input Voltage V MR Input ...
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Power-Supply Sequencers/Supervisors TIMING CHARACTERISTICS = +2.7V to +5.5V, GPI_ = GND, MARGIN = MR = DBP, T (IN1 = GND +10V, V –V IN2 IN3 IN6 noted. Typical values are +25°C.) (Notes ...
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... TEMPERATURE (°C) OUTPUT VOLTAGE LOW vs. SINK CURRENT OPEN-DRAIN, CHARGE PUMP, OR WEAK PULLUP PO1–PO4 (MAX6872) PO1–PO2 (MAX6873) PUSH-PULL PO5–PO8 (MAX6872) PO3–PO5 (MAX6873 (mA) SINK ...
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... MEASURED RELATIVE TO V 5.5 5.0 PO1–PO4 (MAX6872) PO1–PO2 (MAX6873) 4.5 4.0 3.5 3 (µA) OUT MAXIMUM MR TRANSIENT DURATION vs. MR THRESHOLD OVERDRIVE 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 PO_ ASSERTION OCCURS ABOVE THIS LINE 0.4 0.3 0.2 0 100 1000 MR THRESHOLD OVERDRIVE (mV) MAX6872/73 toc14 V PO1 10V/div V SOURCE 2V/div I DRAIN 5A/div ABP ...
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... Address Input 0. Address inputs allow up to four MAX6872/MAX6873 connections on one common bus. Connect A0 to GND or to the serial interface power supply. Address Input 1. Address inputs allow up to four MAX6872/MAX6873 connections on one common bus. Connect A1 to GND or to the serial interface power supply. ...
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... Configure GPI1 to control watchdog timer functions or the programmable outputs. Internal Power-Supply Output. Bypass ABP to GND with a 1µF ceramic capacitor. ABP powers the internal circuitry of the MAX6872/MAX6873. ABP supplies the input voltage to the internal charge pumps when the programmable outputs are configured as charge- pump outputs. Do not use ABP to supply power to external circuitry. Internal Digital Power-Supply Output. Bypass DBP to GND with a 1µ ...
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... Positive inputs (IN3–IN6) provide detector threshold voltages from +0.5V to +3.05V in 10mV increments, or +1.0V to +5.5V in 20mV increments. The host controller communicates with the MAX6872/ MAX6873s’ internal 4kb user EEPROM, configuration EEPROM, configuration registers, and fault registers through an SMBus/I Figure 1) ...
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... PROGRAMMABLE TIMING BLOCK 2 ARRAY TIMING BLOCK 3 TIMING BLOCK 4 TIMING BLOCK 5 TIMING BLOCK 6 TIMING BLOCK 7 TIMING BLOCK 8 MAIN OSCILLATOR CONFIG REGISTERS MAX6872 MAX6873 GND Functional Diagram PO_ OUTPUT MUX *PO1–PO4 ONLY (PO1, PO2) ** PO5–PO8 ONLY (PO3, PO4, PO5) P1** 10kΩ ...
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... IN1 or IN3–IN6. A virtual diode- ORing scheme selects the positive input that supplies power to the device (see the Functional Diagram). IN1 must be at least +4V or one of IN3–IN6 (MAX6872)/ IN3–IN4 (MAX6873) must be at least +2.7V to ensure device operation. An internal LDO regulates IN1 down to +5.4V. The highest input voltage on IN3– ...
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... Open-drain, weak pullup, or push-pull output Programmable Outputs • Weak pullup to IN3–IN6 (IN3 or IN4 for MAX6873) or ABP PO5–PO8 (MAX6872), • Push-pull to IN3–IN6 (IN3 or IN4 for MAX6873) PO3–PO5 (MAX6873) • Dependent on MR, MARGIN, IN_, GPI1–GPI4 , WD1 and WD2, and/or PO_ • ...
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EEPROM-Programmable, Hex/Quad, Power-Supply Sequencers/Supervisors Table 2. IN1 Threshold Settings EEPROM REGISTER BIT MEMORY ADDRESS RANGE ADDRESS 00h 8000h [7:0] 06h 8006h [7:0] 0Ch 800Ch [0] 0Dh 800Dh [0] Table 3. IN2 Threshold Settings EEPROM REGISTER BIT MEMORY ADDRESS RANGE ADDRESS ...
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... IN3–IN6 section). IN5 (MAX6872 only) secondary undervoltage/overvoltage detector threshold (V5B) (see equations in the IN3–IN6 section). IN6 (MAX6872 only) secondary undervoltage/overvoltage detector threshold (V6B) (see equations in the IN3–IN6 section). IN3 secondary overvoltage/undervoltage selection overvoltage threshold undervoltage threshold. ...
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... PO5/PO3 asserts when MR = low. PO6 (MAX6872)/PO4 (MAX6873 PO6/PO4 independent of MR PO6/PO4 asserts when MR = low. PO7 (MAX6872)/PO5 (MAX6873 PO7/PO5 independent of MR PO7/PO5 asserts when MR = low. PO8 (MAX6872 only PO8 independent of MR PO8 asserts when MR = low. Programmable Outputs . The programmable outputs remain in UVLO (Table DESCRIPTION 20) ...
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... No output can depend solely on MR. The positive voltage monitors generate fault signals (logical 0) to the MAX6872/MAX6873s’ logic array when an input voltage is below the programmed undervolt- age threshold, or when that voltage is above the over- voltage threshold. The negative voltage monitor (IN2) 7 ...
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... PO6 (MAX6872)/ PO4 (MAX6873) allow two sets of different conditions to assert each output. Outputs PO1 and PO2 (MAX6872 only), PO7 (MAX6872)/PO5 (MAX6873), and PO8 (MAX6872 only) allow only one set of conditions to assert each output. 18 ______________________________________________________________________________________ OUTPUT ASSERTION CONDITIONS 1 = PO1 assertion depends on IN1 primary undervoltage threshold (Table 2) ...
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... WD1 or WD2, GPI1–GPI4, MR, or other pro- (Table grammable outputs). Table 9 only applies to PO2 of the MAX6872. Write bit to make the PO2 output independent of the respective signal (IN1–IN6 primary or secondary thresholds, WD1 or WD2, GPI1–GPI4, MR, or other pro- grammable outputs) ...
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... PO3/PO1 assertion depends on IN2 primary undervoltage threshold (Table 3). [ PO3/PO1 assertion depends on IN3 primary undervoltage threshold (Table 4). [ PO3/PO1 assertion depends on IN4 primary undervoltage threshold (Table 4 PO3 (MAX6872 only) assertion depends on IN5 primary undervoltage threshold (Table 4). 16h 8016h [4] Must be set to 0 for the MAX6873. ...
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... PO3 (MAX6872 only) assertion depends on IN5 primary undervoltage threshold (Table 4). [4] 19h 8019h Must be set to 0 for the MAX6873 PO3 (MAX6872 only) assertion depends on IN6 primary undervoltage threshold (Table 4). [5] Must be set to 0 for the MAX6873. [ PO3/PO1 assertion depends on watchdog 1 (Tables 25 and 26). ...
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... P O4 asser end 6872 6873) ( Tab and 15 asser end 6872 6873) ( Tab and 17 PO4/PO2 assertion depends on PO7 (MAX6872)/PO5 (MAX6873) (Table 18). 23h 8023h [ 6872 onl y) asser end Tab l e 19) ...
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... PO4 (MAX6872 only) assertion depends on IN5 primary undervoltage threshold (Table 4). [4] 20h 8020h Must be set to 0 for the MAX6873 PO4 (MAX6872 only) assertion depends on IN6 primary undervoltage threshold (Table 4). [5] Must be set to 0 for the MAX6873. [ PO4/PO2 assertion depends on watchdog 1 (Tables 25 and 26). ...
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... PO5 (MAX6872 only) assertion depends on IN5 primary undervoltage threshold (Table 4). 24h 8024h [4] Must be set to 0 for the MAX6873 PO5 (MAX6872 only) assertion depends on IN6 primary undervoltage threshold (Table 4). [5] Must be set to 0 for the MAX6873. [ PO5/PO3 assertion depends on watchdog 1 (Tables 25 and 26). ...
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... PO5 (MAX6872 only) assertion depends on IN5 primary undervoltage threshold (Table 4). [4] 27h 8027h Must be set to 0 for the MAX6873 PO5 (MAX6872 only) assertion depends on IN6 primary undervoltage threshold (Table 4). [5] Must be set to 0 for the MAX6873. [ PO5/PO3 assertion depends on watchdog 1 (Tables 25 and 26). ...
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... PO6 (MAX6872 only) assertion depends on IN5 primary undervoltage threshold (Table 4). 2Bh 802Bh [4] Must be set to 0 for the MAX6873 PO6 (MAX6872 only) assertion depends on IN6 primary undervoltage threshold (Table 4). [5] Must be set to 0 for the MAX6873. [ PO6/PO4 assertion depends on watchdog 1 (Tables 25 and 26). ...
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... PO6 (MAX6872 only) assertion depends on IN5 primary undervoltage threshold (Table 4). [4] 2Eh 802Eh Must be set to 0 for the MAX6873 PO6 (MAX6872 only) assertion depends on IN6 primary undervoltage threshold (Table 4). [5] Must be set to 0 for the MAX6873. [ PO6/PO4 assertion depends on watchdog 1 (Tables 25 and 26). ...
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... PO7/PO5 assertion depends on IN2 primary undervoltage threshold (Table 3). [ PO7/PO5 assertion depends on IN3 primary undervoltage threshold (Table 4). [ PO7/PO5 assertion depends on IN4 primary undervoltage threshold (Table 4 PO7 (MAX6872 only) assertion depends on IN5 primary undervoltage threshold (Table 4). 32h 8032h [4] Must be set to 0 for the MAX6873. ...
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... PO8 asserts when MR = low (Table 6). 40h 8040h [7] Table 19 only applies to PO8 of the MAX6872. Write bit to make the PO8 output independent of the respective signal (IN1–IN6 primary or secondary thresholds, WD1 or WD2, GPI1–GPI4, MR, or other pro- grammable outputs). Output Stage Configurations ...
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... PO3 (MAX6872)/PO1 (MAX6873 active low active high. PO4 (MAX6872)/PO2 (MAX6873 active low active high. PO5 (MAX6872)/PO3 (MAX6873 active low active high. PO6 (MAX6872)/PO4 (MAX6873 active low active high. PO7 (MAX6872)/PO5 (MAX6873 active low active high. PO8 (MAX6872 only active low active high. ...
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... Charge-Pump Output Configuration Configure the programmable outputs of the MAX6872/ MAX6873 as charge-pump outputs to drive n-channel FETs for power-supply sequencing applications. Only PO1–PO4 (MAX6872) or PO1 and PO2 (MAX6873) can be configured as charge-pump output stages. The charge-pump output high voltage is typically V +5.5V when unloaded. Push-Pull Output Configuration The MAX6872/MAX6873s’ ...
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... Use 4.7kΩ for most applications. Each clock pulse transfers one data bit. The data on SDA must remain stable while SCL is high otherwise the MAX6872/MAX6873 register a START or STOP condition SCL idle high when the bus is not busy. t ...
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... The MAX6872/MAX6873 generate a NACK after the slave address during a software reboot, while writing to the EEPROM, or when receiving an illegal memory address. The MAX6872/MAX6873 slave address conforms to the following table devices SA7 (MSB Don’ ...
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... A1 and A0 address inputs of the MAX6872/MAX6873 (hard-wired as logic-low or logic- high). SA0 is a read/write flag bit (0 = write read). The A0 and A1 address inputs allow up to four MAX6872/MAX6873 devices to connect to one bus. Connect A0 and A1 to GND or to the serial interface power supply (see Figure 6) ...
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Power-Supply Sequencers/Supervisors SEND BYTE FORMAT S ADDRESS WR ACK DATA ACK 7 bits 0 8 bits Slave Address– Data Byte–presets the equivalent to chip- internal address pointer. select line wire interface. RECEIVE BYTE FORMAT S ADDRESS WR ...
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... Receive Byte 00h to 45h. Register addresses outside of this range result in a NACK being issued from the MAX6872/ MAX6873. When using the block write protocol, the address pointer automatically increments after each data byte, except when the address pointer is already at 45h ...
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... IN6 primary undervoltage detector threshold (MAX6872 only) (Table 4) IN1 secondary undervoltage/overvoltage detector threshold (Table 2). IN2 secondary undervoltage/overvoltage detector threshold (Table 3) IN3 secondary undervoltage/overvoltage detector threshold (Table 4) IN4 secondary undervoltage/overvoltage detector threshold (Table 4) IN5 secondary undervoltage/overvoltage detector threshold (MAX6872 only) (Table 4) Table 28). The maximum cycle User EEPROM Figure 8) ...
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... PO2 (MAX6872 only) input selection (Table 9) PO2 (MAX6872 only) input selection (Table 9) PO2 (MAX6872 only) input selection (Table 9) PO2 (MAX6872 only) input selection, PO_ timeout period, and output type selection (Tables 9, 21, and 23) PO3 (MAX6872)/PO1 (MAX6873) input selection—Product 1 (Table 10) PO3 (MAX6872)/PO1 (MAX6873) input selection— ...
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... PO8 (MAX6872 only) input selection (Table 19) PO8 (MAX6872 only) input selection (Table 19) PO8 (MAX6872 only) input selection (Table 19) PO8 (MAX6872 only) input selection, PO_ timeout period, and output type selection (Tables 19, 21, 22, and 23) Programmable output polarity (active high/active low) (Table 20) ...
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EEPROM-Programmable, Hex/Quad, Power-Supply Sequencers/Supervisors Table 24. Register Map (continued) EEPROM REGISTER READ/ MEMORY ADDRESS WRITE ADDRESS 50h — R 51h — R 52h — R 53h — R 54h — R 55h — R 56h — R 57h — R ...
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... PO4 (MAX6872), PO2 (MAX6873) 100 = PO5 (MAX6872), PO3 (MAX6873) 101 = PO6 (MAX6872), PO4 (MAX6873) 110 = PO7 (MAX6872), PO5 (MAX6873) 111 = PO8 (MAX6872), not used (MAX6873) Watchdog Dependency on Inputs Watchdog clear depends on both GPI_ from 3Ch[1:0] (watchdog 1) or 3Eh[1:0] (watchdog 2) and PO_ from 3Ch[4:2] (watchdog 1) or 3Eh[4:2] (watchdog 2) ...
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... Clear the lock bit to recon- figure the device. A unique write disable feature protects the MAX6872/ MAX6873 from inadvertent user EEPROM writes. As input voltages that power the serial interface, a µP, or any other writing devices fall, unintentional data may be written onto the data bus ...
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... IN5 (MAX6872 only) falls below secondary undervoltage threshold or rises above secondary [4] overvoltage threshold, depending on the settings in register 0Ch (see Tables 2, 3, and 4 IN6 (MAX6872 only) falls below secondary undervoltage threshold or rises above secondary [5] overvoltage threshold, depending on the settings in register 0Ch (see Tables 2, 3, and 4). ...
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... Not used. DESCRIPTION 0 = write not disabled if PO1 asserts (MAX6872 write disabled if PO1 asserts (MAX6872). Set to 0 (MAX6873 write not disabled if PO2 asserts (MAX6872 write disabled if PO2 asserts (MAX6872). Set to 0 (MAX6873 write not disabled if PO3 (MAX6872)/PO1 (MAX6873) asserts. ...
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... MAX6873ETJ Other Fault Signals from µC Connect a general-purpose output from a µC to one of the GPI_ inputs to allow interrupts to assert any output of the MAX6872/MAX6873. Configure one of the pro- grammable outputs to assert on whichever GPI_ input connects to the general-purpose output of the µC. Layout and Bypassing For better noise immunity, bypass each of the voltage detector inputs to GND with 0.1µ ...
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EEPROM-Programmable, Hex/Quad, Power-Supply Sequencers/Supervisors +12V DC-DC 1 DC-DC 2 IN1 PO1 IN3 PO2 IN4 MARGIN MR ABP MAX6873 DBP +12V BUS INPUT +12V SUPPLY t ENABLE +5V DC-DC CONVERTER PO1 PO1 +5V OUTPUT +5V SUPPLY t ENABLE +2.5V DC-DC CONVERTER ...
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Power-Supply Sequencers/Supervisors (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) D D/2 e Chip Information PROCESS: BiCMOS ______________________________________________________________________________________ EEPROM-Programmable, Hex/Quad, E/2 (NE- ...
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EEPROM-Programmable, Hex/Quad, Power-Supply Sequencers/Supervisors (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely ...