MAX6967 MAXIM [Maxim Integrated Products], MAX6967 Datasheet - Page 12

• Manufacturer Part Number: MAX6967
• Description: 10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
• Manufacturer: MAXIM [Maxim Integrated Products]

A PWM period comprises 256 cycles of the nominal
32kHz PWM clock
ally to a PWM duty between 3/256 and 254/256.
PWM timing can be configured one of two ways by the
setting of the stagger bit in the configuration register
(Table 4). When the stagger bit is clear, all outputs using
PWM switch at the same time use the timing shown in
Figure 2. All outputs therefore draw load current at exact-
ly the same time for the same PWM setting. This means
10-Port Constant-Current LED Drivers and I/O
Expanders with PWM Intensity Control
Figure 2. Static and PWM Constant-Current Waveforms
Figure 3. Staggered PWM Waveform
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REGISTER
0x00
0x01
0x02
0x03
0x04
0xFC
0xFD
0xFE
0xFF
0
OUTPUT
VALUE
32
OUTPUTS P0, O8 IN-PHASE PWM PERIOD
7.8125ms NOMINAL PWM PERIOD
64
OUTPUT P1, O9 STAGGERED PWM PERIOD
(Figure 2). Ports can be set individu-
96
OUTPUT P2 STAGGERED PWM PERIOD
PWM Timing and Phasing
128
OUTPUT P3 STAGGERED PWM PERIOD
160
OUTPUT LOW 252/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE)
OUTPUT LOW 253/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE)
OUTPUT LOW 254/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE)
OUTPUT STATIC-LOW CONSTANT CURRENT WITH INPUT BUFFER DISABLED (STATIC LED DRIVE ON)
OUTPUT LOW 3/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE)
OUTPUT LOW 4/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE)
OUTPUT P4 STAGGERED PWM PERIOD
OUTPUT STATIC HIGH IMPEDANCE WITH INPUT BUFFER DISABLED (STATIC LED DRIVE OFF)
192
OUTPUT P5 STAGGERED PWM PERIOD
OUTPUT STATIC-HIGH LOGIC DRIVE WITH INPUT BUFFER ENABLED (GPI)
OUTPUT STATIC-LOW LOGIC DRIVE WITH INPUT BUFFER ENABLED (GPI)
224
OUTPUT P6 STAGGERED PWM PERIOD
256
OUTPUT P7 STAGGERED PWM PERIOD
7.8125ms NOMINAL PWM PERIOD
OUTPUTS P0, O8 IN-PHASE PWM PERIOD
OUTPUT P1, O9 STAGGERED PWM PERIOD
NEXT PWM PERIOD
OUTPUT P2 STAGGERED PWM PERIOD
OUTPUT P3 STAGGERED PWM PERIOD
that if, for example, all outputs are set to 128/256 duty
cycle, the current draw would be zero (all loads off) for
half the time and full (all loads on) for the other half.
When the stagger bit is set, the PWM timing of the 10 port
outputs is staggered by 32 counts of the 256-count PWM
period (i.e., 1/8), distributing the port output switching
points across the PWM period (Figure 3). The staggering
reduces the di/dt output-switching transient on the supply,
and also reduces the peak/mean current requirement.
OUTPUT P4 STAGGERED PWM PERIOD
OUTPUT P5 STAGGERED PWM PERIOD
OUTPUT P6 STAGGERED PWM PERIOD
OUTPUT P7 STAGGERED PWM PERIOD
OUTPUTS P0, O8 IN-PHASE PWM PERIOD
OUTPUT P1, O9 STAGGERED PWM PERIOD
NEXT PWM PERIOD
HIGH-Z
HIGH-Z
HIGH-Z
HIGH-Z
HIGH-Z
HIGH-Z
HIGH-Z
HIGH-Z
HIGH-Z
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW