AD7291_11 AD [Analog Devices], AD7291_11 Datasheet - Page 18

• Manufacturer Part Number: AD7291_11
• Description: 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor
• Manufacturer: AD [Analog Devices]

AD7291
Table 12. Channel Selection Bits for Command Register
D15
0
0
0
0
0
0
0
0
1
Table 13. T
Input
Value (°C)
Sample Delay and Bit Trial Delay
Ideally, no I
conversion is taking place. However, this may not be possible,
for example, when operating in autocycle mode. It is therefore
recommended to enable the noise delayed bit trial and sampling
function by writing a 1 to Bit D5 in the command register. This
mechanism delays critical sample intervals and bit trials while
there is activity on the I
each bit decision, and conversion results are less susceptible to
interference from external noise.
On power-up, the bit trial and sample interval delay mechanism
is not enabled. It is recommended that this feature should be
enabled for normal operation. When enabled, the AD7291
delays the bit trials, mitigating against the effect of activity on
the I
interface lines, enabling these bits may cause the overall
conversion time to increase.
The AD7291 also incorporates functionality that allows it to
reject glitches shorter than 50 ns. This feature improves the
noise susceptibility of the device.
VOLTAGE CONVERSION RESULT REGISTER (0x01)
The voltage conversion result register is a 16-bit read-only
register that stores the conversion result from the ADC in
straight binary format. A 2-byte read is necessary to read data
from this register. Table 14 and Table 15 show the contents of
the first and second bytes of data to be read from the AD7291.
Each AD7291 conversion result consists of four channel address
bits (see Table 14 and Table 15) and the 12-bit data result.
Bit D15 to Bit D12 are the channel address bits that identify
the ADC channel that corresponds to the subsequent result.
Bit D11 to Bit D0 contain the most recent ADC result.
2
C bus. In cases where there is excessive activity on the
D14
0
0
0
0
0
0
0
1
0
SENSE
2
C bus activity should occur while an ADC
D13
0
0
0
0
0
0
1
0
0
Data Format
D11 (MSB)
−512
2
C bus. This results in a quiet period for
0
0
0
0
0
1
0
0
0
D12
D11
0
0
0
0
1
0
0
0
0
D10
+256
D10
0
0
0
1
0
0
0
0
0
D9
+128
0
0
1
0
0
0
0
0
0
D9
D8
+64
D8
0
1
0
0
0
0
0
0
0
Rev. 0 | Page 18 of 28
Selected Analog Input Channel
No channel selected
Convert on Channel 7 (V
Convert on Channel 6 (V
Convert on Channel 5 (V
Convert on Channel 4 (V
Convert on Channel 3 (V
Convert on Channel 2 (V
Convert on Channel 1 (V
Convert on Channel 0 (V
D7
+32
Table 14. Conversion Value Register (First Read)
D15
ADD3
Table 15. Conversion Value Register (Second Read)
D7
B7
Table 16. Channel Address Bits for the Result Register
ADD2
0
0
0
0
0
0
0
0
1
1
Temperature Value Format
The temperature reading from the ADC is stored in an 11-bit
twos complement format, D11 to D0, to accommodate both
positive and negative temperature measurements. The tem-
perature data format is provided in Table 13.
T
The T
store the ADC data generated from the internal temperature
sensor. This register stores the temperature readings from the
ADC in a 12-bit twos complement format, D11 to D0, and
uses Bit D15 to Bit D12 to store the channel address bits.
Conversions take place approximately every 5 ms. Table 13
details the temperature data format that applies to the internal
temperature sensor.
D6
+16
SENSE
SENSE
CONVERSION RESULT REGISTER (0x02)
D6
B6
D14
ADD2
ADD2
0
0
0
0
1
1
1
1
0
0
D5
+8
result register is a 16-bit read-only register used to
IN7
IN6
IN5
IN4
IN3
IN2
IN1
IN0
D5
B5
)
)
)
)
)
)
)
)
D4
+4
D13
ADD1
ADD1
0
0
1
1
0
0
1
1
0
0
D4
B4
D3
+2
Comments
If more than one channel is
selected, the AD7291 converts the
selected channels starting with the
lowest channel in the sequence.
D12
ADD0
ADD0
0
1
0
1
0
1
0
1
0
1
D3
B3
D2
+1
MSB
D11
B11
V
V
V
V
V
V
V
V
T
T
Analog Input Channel
SENSE
SENSE
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
D1
+0.5
D2
B2
average result
D10
B10
D1
B1
D0 (LSB)
+0.25
D9
B9
LSB
D0
B0
D8
B8