UDA1351 PHILIPS [NXP Semiconductors], UDA1351 Datasheet - Page 11

no-image

UDA1351

Manufacturer Part Number
UDA1351
Description
96 kHz IEC 958 audio DAC
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UDA1351H
Manufacturer:
POWER
Quantity:
66
Part Number:
UDA1351H/N1,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
UDA1351H/N1,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
UDA1351TS
Manufacturer:
PHILIPS
Quantity:
61
Part Number:
UDA1351TS
Manufacturer:
NXPLIPS
Quantity:
5 510
Part Number:
UDA1351TS
Manufacturer:
ATMEL
Quantity:
5 510
Part Number:
UDA1351TS
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
UDA1351TS
Quantity:
296
Part Number:
UDA1351TS/N1
Manufacturer:
PHILIPS
Quantity:
986
Philips Semiconductors
8.4
By default the outputs of the digital data output interface
and the DAC will be muted until the IC is locked,
regardless the level on pin MUTE (in static mode) or the
state of bit MT of the sound feature register (in L3 mode).
In this way only valid data will be passed to the outputs.
This mute is done in the SPDIF interface and is a hard
mute, not a cosine roll-off mute.
If needed this muting can be bypassed by setting
bit AutoMT to logic 0 via the L3 interface. As a result the IC
will no longer mute during out-of-lock situations.
8.5
The UDA1351H data path consists of the slicer and the
IEC 958 decoder, the digital data output and input
interfaces, the audio feature processor, digital interpolator
and noise shaper and the digital-to-analog converters.
8.5.1
The UDA1351H IEC 958 decoder can select 1 out of 2
IEC 958 input channels. An on-chip amplifier with
hysteresis amplifies the IEC 958 input signal to CMOS
level (see Fig.4).
All 24 bits of data for left and right are extracted from the
input bitstream as well as several of the IEC 958 key
channel-status bits.
2000 Feb 18
handbook, halfpage
96 kHz IEC 958 audio DAC
Fig.4 IEC 958 input circuit and typical application.
75
Auto mute
Data path
IEC 958
10 nF
180 pF
INPUT
SPDIF0,
SPDIF1
15,
16
UDA1351H
MGL975
11
The extracted key parameters are:
Both the lock indicator and the key channel status bits are
accessible via the L3 interface.
The UDA1351H supports the following sample
frequencies and data bit rates:
The UDA1351H supports timing level I, II and III as
specified by the IEC 958 standard.
Pre-emphasis
Audio sample frequency
Two-channel PCM indicator
Clock accuracy.
f
f
f
f
f
f
s
s
s
s
s
s
= 32.0 kHz, resulting in a data rate of 2.048 Mbits/s
= 44.1 kHz, resulting in a data rate of 2.8224 Mbits/s
= 48.0 kHz, resulting in a data rate of 3.072 Mbits/s
= 64.0 kHz, resulting in a data rate of 4.096 Mbits/s
= 88.2 kHz, resulting in a data rate of 5.6448 Mbits/s
= 96.0 kHz, resulting in a data rate of 6.144 Mbits/s.
Preliminary specification
UDA1351H

Related parts for UDA1351