TDA9910HW/6 PHILIPS [NXP Semiconductors], TDA9910HW/6 Datasheet - Page 12

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TDA9910HW/6

Manufacturer Part Number
TDA9910HW/6
Description
12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC) direct/ultra high IF sampling
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
Philips Semiconductors
10. Definitions
9397 750 14418
Objective data sheet
10.1.1
10.1.2
10.1 Static parameters
The TDA9910 allows to modify the ADC full-scale. This could be done with FSIN
(full-scale input) according to
The TDA9910 generates an adjustable clock output called Complete Conversion Signal
(CCS), which can be used to control the acquisition of converted output data by the digital
circuit connected to the TDA9910 output data bus. Two logic inputs, DEL0 and DEL1 pins,
allow to adjust the delay of the edge of the CCS signal to achieve an optimal position in
the stable, usable zone of the data.
Table 8:
INL (integral non-linearity)
It is defined as the deviation of the transfer function from a best fit straight line (linear
regression computation). The INL of the code i is obtained from the equation:
where:
S is corresponding to the slope of the ideal straight line (code width); i is corresponding to
the code value.
DNL (differential non-linearity)
It is the deviation in code width from the value of 1 LSB.
INL i
DNL i
DEL1
0
0
1
1
Fig 6. Complete conversion signal timing diagram.
(1) t
=
DEL0
0
1
0
1
=
cd(o)
V
------------------------------------------ -
Complete conversion signal selection
V
---------------------------------------- -
I
is referenced to the middle of the active data.
I
i
D0 to D11
i
+
CCS output
high-impedance
active, typical delay 0.2 ns
active, typical delay 1.3 ns
active, typical delay 2.4 ns
V
1
CCS
S
S
I
ideal
Rev. 02 — 9 December 2004
V
12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC)
I
t
i
cd(o)
Figure
(1)
5.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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TDA9910
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