PCA9558 PHILIPS [NXP Semiconductors], PCA9558 Datasheet - Page 6

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PCA9558

Manufacturer Part Number
PCA9558
Description
8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C EEPROM and 2 k bit EEPROM
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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1. NON_MUXED_OUT value will be the value present in the 6-bit EEPROM at the time of the rising edge of the MUX_SELECT input.
2. NON_MUXED_OUT value will be the value present int he 6-bit EEPROM at the time of the slave ACK when bit1 has changed from 0 to 1.
3. These are the 2LSBs of the MUXCNTRL (Mux Control) Register
Philips Semiconductors
The Multiplexer function controls the six open drain outputs, MUX_OUTx and NON_MUXED_OUT. This control is effected by the input pins
MUX_SELECT (Pin 19), MUX_OUT_LOW (Pin 26), and/or an internal register programmed via the I
function is controlled by the MUX_SELECT and MUX_OUT_LOW pins. When the MUX_SELECT signal is a logic 0, the multiplexer will select
the data from the 6-bit EEPROM to drive on the MUX_OUTx and NON_MUXED_OUT pins. When the MUX_SELECT signal is a logic 1, the
multiplexer will select the MUX_INx pins to drive on the MUX_OUTx pins. The NON_MUXED_OUT output is latched from the 6-bit EEPROM on
a rising edge of the MUX_SELECT signal. This latch is transparent while the MUX_SELECT signal is a logic 0. An internal control register,
written via the I
external pin to an internal register. In this register a bit will act in a similar fashion to the MUX_SELECT input, i.e., a logic 1 will cause the
multiplexer to select data from the 6-bit EEPROM to drive on the MUX_OUTx and NON_MUXED_OUT pins. In this configuration, the
NON_MUXED_OUT will latch data when the PCA9558 acknowledges the I
MUX_OUTx or NON_MUXED_OUT while in this mode. When the MUX_OUT_LOW signal is a logic 0 and the multiplexer is configured so that
the MUX_OUTx pins are being driven by the 6-bit EEPROM, the MUX_OUTx pins will be driven to a logic 0. This information is summarized in
Table 1.
Table 1. Multiplexer function table
NOTES:
If the MUX_OUTx outputs are being driven by the 6-bit EEPROM and this EEPROM is programmed, the outputs will remain stable and change
to the new values after the EEPROM program cycle completes.
Examples of Read/Write for MUX control can be found in Figure 5.
2002 May 24
8-bit I
latched 6-bit I
B1
0
1
0
1
x
x
x
x
3
REG.
2
S
B0
C and SMBus I/O port with 5-bit multiplexed/1-bit
2
0
0
0
0
1
1
1
1
1
C bus, can also control the multiplexer function. When this register is written, the MUX_SELECT function can change from the
3
SLAVE ADDRESS
0
0
MUX_OUT_LOW
1
2
S
C EEPROM and 2 k bit EEPROM
1
1
0
0
1
1
0
0
1
1
SLAVE ADDRESS
1 A0 0
0
ACKNOWLEDGE
0
FROM SLAVE
R/W
1
A
INPUT
1
0
1 A0 0
MUX_SELECT
0
ACKNOWLEDGE
COMMAND BYTE
Figure 5. I
Figure 6. I
FROM SLAVE
0
R/W
0
1
0
1
0
x
x
x
x
A
1
0
0
0
2
2
C write for MUXCNTRL register
C read for MUXCNTRL register
COMMAND BYTE
1
ACKNOWLEDGE
0
FROM SLAVE
1
0
A
1
S
6
0
1
2
MUX_INx inputs
MUX_INx inputs
MUX_INx inputs
MUX_INx inputs
1
C-bus. The MUX_SELECT pin will have no effect on the
ACKNOWLEDGE
from EEPROM
from EEPROM
SLAVE ADDRESS
FROM SLAVE
0
MUX_OUTx
1
0
A
0
0
1
0
1
0
1 A0 1
0
DATA BYTE
ACKNOWLEDGE
0
FROM SLAVE
R/W
0
A
2
0 B1 B0 A
OUTPUT
C-bus. Upon power-up the multiplex
0
ACKNOWLEDGE
FROM SLAVE
0
DATA FROM SLAVE
0
latched from EEPROM
latched from EEPROM
latched from EEPROM
latched from EEPROM
0
NON_MUXED_OUT
P
0
from EEPROM
from EEPROM
0 B1 B0 NA
NO ACKNOWLEDGE
FROM MASTER
0
0
PCA9558
SW00636
P
Product data
SW00635
1
1
2
2

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