AD5308_1 AD [Analog Devices], AD5308_1 Datasheet - Page 6

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AD5308_1

Manufacturer Part Number
AD5308_1
Description
2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP
Manufacturer
AD [Analog Devices]
Datasheet
AD5308/AD5318/AD5328
Table 3. Timing Characteristics
Parameter
t
t
t
t
t
t
t
t
t
t
t
1
2
3
1
2
3
4
5
6
7
8
9
10
11
Guaranteed by design and characterization; not production tested.
All input signals are specified with t
See Figure 2
.
LDAC
LDAC
SYNC
SCLK
DIN
1
2
NOTES
1
2
A, B Version
Limit at T
33
13
13
13
5
4.5
0
50
20
20
0
ASYNCHRONOUS LDAC UPDATE MODE.
SYNCHRONOUS LDAC UPDATE MODE.
t
8
R
= t
MIN
1, 2, 3
F
= 5 ns (10% to 90% of V
, T
DB15
MAX
t
t
6
4
t
5
t
3
Figure 2. Serial Interface Timing Diagram
DD
) and timed from a voltage level of (V
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
t
1
t
2
Rev. D | Page 6 of 24
DB0
t
t
7
11
Conditions/Comments
SCLK cycle time
SCLK high time
SCLK low time
SYNC to SCLK falling edge set up time
Data set up time
Data hold time
SCLK falling edge to SYNC rising edge
Minimum SYNC high time
LDAC pulse width
SCLK falling edge to LDAC rising edge
SCLK falling edge to LDAC falling edge
t
9
t
10
IL
+ V
IH
)/2.

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