AD5337BRM AD [Analog Devices], AD5337BRM Datasheet - Page 18

• Manufacturer Part Number: AD5337BRM
• Description: 2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs
• Manufacturer: AD [Analog Devices]

AD5337/AD5338/AD5339
READ OPERATION
When reading data back from the AD5337/AD5338/AD5339
DACs, the user begins with an address byte (R/ W = 0), after
which the DAC acknowledges that it is prepared to receive data
by pulling SDA low. This address byte is usually followed by the
pointer byte, which is also acknowledged by the DAC. Then the
master initiates another start condition (repeated start) and the
address is resent with R/ W = 1. This is acknowledged by the
DAC indicating that it is prepared to transmit data. Two bytes
of data are then read from the DAC as shown in Figure 34. A
stop condition follows. Note that in a read sequence, data bytes
are the same as those in the write sequence except that don’t
SDA
SDA
SDA
SCL
SCL
SCL
CONDITION
MASTER
START
BY
CONDITION
REPEATED
MASTER
START
BY
0
MSB
0
0
0
0
LEAST SIGNIFICANT DATA BYTE
ADDRESS BYTE
ADDRESS BYTE
0
1
1
1
0
1
A0
0
A0
R/W
LSB
Figure 34. Read Sequence
AD533x
Rev. A | Page 18 of 24
ACK
BY
MASTER
R/W
ACK
NO
BY
AD533x
MSB
ACK
X
BY
CONDITION
MASTER
STOP
cares are read back as 0. However, if the master sends an ACK
and continues clocking SCL (no stop is sent), the DAC
retransmits the same two bytes of data on SDA. This allows
continuous read back of data from the selected DAC register.
Alternatively, the user may send a start followed by the address
with R/ W = 1. In this case, the previously loaded pointer
settings are used and read back of data can begin immediately.
X
MSB
BY
POINTER BYTE
DATA BYTE
LSB
AD533x
ACK
BY
LSB
MASTER
ACK
BY