DAC7800_04 BURR-BROWN [Burr-Brown Corporation], DAC7800_04 Datasheet - Page 5

• Manufacturer Part Number: DAC7800_04
• Description: Dual Monolithic CMOS 12-Bit Multiplying DIGITAL-TO-ANALOG CONVERTERS
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

DAC7801
LOGIC TRUTH TABLE
TIMING CHARACTERISTICS
V
DAC7800, 7801, 7802
BLOCK DIAGRAM
DD
UPD
CLR
X = Don’t care.
WR
CS
A1
A0
= +5V, V
CLR
1
1
0
1
1
1
1
1
1
19
16
15
18
17
5
PARAMETER
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
— Address Valid to Write Setup Time
— Address Valid to Write Hold Time
— Data Setup Time
— Data Hold Time
— Chip Select or Update to Write Setup Time
— Chip Select or Update to Write Hold Time
— Write Pulse Width
— Clear Pulse Width
REF A
SBAS005A
DAC7801
V
20
UPD
DD
= V
X
1
1
1
1
1
1
0
0
REF B
14
DB7–DB0
= +10V, T
6
CS
1
X
X
0
0
0
0
1
0
DAC A
DAC B
Input
Input
Reg
Reg
MS
MS
DAC A Register
DAC B Register
4
4
A
= –40 C to +85 C.
DAC B
DAC A
12
12
WR
X
X
1
0
0
0
0
0
0
DAC A
DAC B
Input
Input
Reg
Reg
LS
LS
8
8
DGND
12
A1
X
X
X
0
0
1
1
X
X
21
22
23
24
MINIMUM
2
1
3
4
10ns
10ns
30ns
10ns
40ns
40ns
0ns
0ns
I
AGND A
R
V
V
R
I
AGND B
OUT A
OUT B
FB A
REF A
REF B
FB B
A0
X
X
X
X
X
www.ti.com
0
1
0
1
FUNCTION
No Data Transfer
No Data Transfer
All Registers Cleared
DAC A LS Input Register Loaded with DB7 - DB0 (LSB)
DAC A MS Input Register Loaded with DB3 (MSB) - DB0
DAC B LS Input Register Loaded with DB7 - DB0 (LSB)
DAC B MS Input Register Loaded with DB3 (MSB) - DB0
DAC A, DAC B Registers Updated Simultaneously from Input Registers
DAC A, DAC B Registers are Transparent
PIN CONFIGURATION
NOTES: (1) All input signal rise and fall times are measured from 10% to 90%
of +5V. t
Top View
CS, UPD
A0–A1
DATA
CLR
WR
R
AGND A
= t
DGND
V
I
F
R
OUT A
REF A
DB0
DB1
DB2
DB3
DB4
DB5
= 5ns. (2) Timing measurement reference level is
FB A
CS
10
11
12
1
2
3
4
5
6
7
8
9
t
1
t
5
DAC7801
t
7
t
3
t
4
t
t
6
2
24
23
22
21
20
19
18
17
16
15
14
13
t
8
AGND B
I
R
V
V
UPD
WR
CLR
A1
A0
DB7
DB6
OUT B
FB B
REF B
DD
V
IH
5V
0V
5V
0V
5V
0V
5V
0V
5V
0V
2
+ V
IL
.
DIP
5