ATF22V10CQ ATMEL [ATMEL Corporation], ATF22V10CQ Datasheet - Page 6

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ATF22V10CQ

Manufacturer Part Number
ATF22V10CQ
Description
Highperformance EE PLD
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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Power-up Reset
Preload of Registered
Outputs
Electronic Signature
Word
Security Fuse Usage
Programming/
Erasing
6
ATF22V10C(Q)
The registers in the ATF22V10Cs are designed to reset during power-up. At a point
delayed slightly from V
output state will depend on the polarity of the output buffer.
This feature is critical for state machine initialization. However, due to the asynchronous
nature of reset and the uncertainty of how V
conditions are required:
1. The V
2. After reset occurs, all input and feedback setup times must be met before driving
3. The clock must remain stable during t
The ATF22V10C’s registers are provided with circuitry to allow loading of each register
with either a high or a low. This feature will simplify testing since any state can be forced
into the registers to control test sequencing. A JEDEC file with preload is generated
when a source file with vectors is compiled. Once downloaded, the JEDEC file preload
sequence will be done automatically by most of the approved programmers after the
programming.
There are 64 bits of programmable memory that are always available to the user, even if
the device is secured. These bits can be used for user-specific data.
A single fuse is provided to prevent unauthorized copying of the ATF22V10C fuse pat-
terns. Once programmed, fuse verify and preload are inhibited. However, the 64-bit
User Signature remains accessible.
The security fuse should be programmed last, as its effect is immediate.
Programming/erasing is performed using standard PLD programmers. See “CMOS PLD
Programming Hardware & Software Support” for information on software/programming.
Parameter
t
V
PR
RST
the clock pin high, and
CC
rise must be monotonic, and starts below 0.7V,
Description
Power-up Reset Time
Power-up Reset Voltage
POWER
REGISTERED
OUTPUTS
C LOCK
CC
crossing V
V
R
ST
RST
, all registers will be reset to the low state. The
PR
CC
.
t
PR
actually rises in the system, the following
Typ
600
3.8
t
W
t
S
1,000
Max
4.5
0735P–PLD–01/02
Units
ns
V

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