ATF1516AS ATMEL [ATMEL Corporation], ATF1516AS Datasheet
ATF1516AS
Related parts for ATF1516AS
ATF1516AS Summary of contents
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... Pull-Up Option on JTAG Pins TMS and TDI • Advanced Power Management Features – Edge Controlled Power Down “L” – Individual Macrocell Power Option – Disable ITD on Global Clocks, Inputs and I/O High Performance EE-Based CPLD ATF1516AS/L Preliminary Rev. 0994A-A–01/98 1 ...
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... Block Diagram ATF1516AS ...
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... The ATF1516AS’s enhanced routing switch matrices increase usable gate count, and increase odds of success- ful pin-locked design modifications. The ATF1516AS has up to 160 bi-directional I/O pins and 4 dedicated input pins, depending on the type of device pack- age selected. Each dedicated pin can also serve as a glo- bal control signal ...
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... The XOR gate is also used to emulate T- and JK-type flip-flops. Flip Flop The ATF1516AS’s flip flop has very flexible data and con- trol functions. The data input can come from either the XOR gate, from a separate product term or directly from the I/O pin ...
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... When this is done, the voltage trip level during power-down changes from 2.8V to 0.7V. This is to ensure a robust operating environment. The registers in the ATF1516AS are designed to reset dur- ing power up point delayed slightly from all registers will be reset to the low state. The output RST state will depend on the polarity of the buffer ...
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... Atmel provides ISP hardware and software to allow pro- gramming of the ATF1516AS via the PC. ISP is perfomed by using either a download cable comparable board tester or a simple microprocessor interface. ...
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... R F Power Down Mode The ATF1516AS includes two pins for optional pin con- trolled power down feature. When this mode is enabled, the PD pin acts as the power down pin. When the PD1 and PD2 pin is high, the device supply current is reduced to less than 3 mA ...
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... I/O pins. JTAG Boundary Scan Cell (BSC) Testing The ATF1516AS contains up to 160 I/O pins and 4 input pins, depending on the device type and package type selected. Each input pin and I/O pin has its own boundary scan cell (BSC) in order to support boundary scan testing as described in detail by IEEE Standard 1149 ...
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BSC Configuration for Macrocell OEJ OUTJ TDI Shift Pin BSC 0 Pin 1 TDI Shift TDO Capture Update DR DR Clock Macrocell BSC TDO D Q Capture DR ...
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... PCI Compliance The ATF1516AS also supports the growing need in the industry to support the new Peripheral Component Inter- connect (PCI) interface standard in PCI-based designs and PCI Voltage-to-Current Curves for +5V Signaling in Pull-Up Mode Pull Up VCC 2.4 DC drive point 1.4 AC drive point Current (mA) -44 -2 ATF1516AS/L 10 specifications ...
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... Plastic Quad Flatpack with Heat Spreader (RQFP) Ordering Code ATF1516AS-10QC160 ATF1516AS-10UC192 ATF1516AS-10QHC208 ATF1516AS-15QC160 ATF1516AS-15UC192 ATF1516AS-15QHC208 ATF1516AS-15Q160 ATF1516AS-15UI192 ATF1516AS-15QHI208 ATF1516ASL-20QC160 ATF1516ASL-20UC192 ATF1516ASL-20QHC208 ATF1516ASL-20QI160 ATF1516ASL-20UI192 ATF1516ASL-20QHI208 ATF1516ASL-25QC160 ATF1516ASL-25UC192 ATF1516ASL-25QHC208 ATF1516ASL-25QI60 ATF1516ASL-25UI192 ATF1516ASL-25QHI208 Package Type Package Operation Range 160Q Commercial 192U ( 208QH 160Q Commercial 192U ...