XCR3256XL-10CS280C XILINX [Xilinx, Inc], XCR3256XL-10CS280C Datasheet
XCR3256XL-10CS280C
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XCR3256XL-10CS280C Summary of contents
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... Preliminary Product Specification 0 14 Description The XCR3256XL is a 3.3V, 256 macrocell CPLD targeted at power sensitive designs that require leading edge program- mable logic solutions. A total of 16 function blocks provide 6,000 usable gates. Pin-to-pin propagation delays are 7.5 ns with a maximum system frequency of 140 MHz. ...
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... XCR3256XL 256 Macrocell CPLD DC Electrical Characteristics Over Recommended Operating Conditions Symbol Parameter (2) V Output High voltage OH V Output Low voltage for 3.3V outputs OL I Input leakage current IL I I/O High-Z leakage current IH I Standby current CCSB (3,4) I Dynamic current CC (5) C Input pin capacitance IN C Clock input capacitance ...
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... Typical current draw during configuration 3.6V. 6. Output pF. L DS013 (v1.9) January 8, 2002 Preliminary Product Specification -7 Min. Max. - 7.0 (3) - 7.5 - 4.5 2.5 - 4 3 140 - 120 - 120 - 9.0 (6) - 9.0 - 8.0 - 9.0 ) for recommended operating conditions. www.xilinx.com 1-800-255-7778 XCR3256XL 256 Macrocell CPLD (1,2) -10 -12 Min. Max. Min. Max. - 9.0 - 10.8 - 10.0 - 12.0 - 5.8 - 6.9 3.0 - 3.0 - 5.5 - 6.7 - 6 4.0 - 5.0 - 6 ...
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... XCR3256XL 256 Macrocell CPLD Internal Timing Parameters Symbol Parameter Buffer Delays T Input buffer delay IN T Fast input buffer delay FIN T Global clock buffer delay GCK T Output buffer delay OUT T Output buffer enable/disable delay EN Internal Register and Combinatorial Delays T Latch transparent delay ...
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... V Figure 3: AC Load Circuit +3.0V 0V Measurements All circuit delays are measured at the +1.5V level of inputs and outputs, unless otherwise specified. DS013_04_042800 PD2 www.xilinx.com 1-800-255-7778 XCR3256XL 256 Macrocell CPLD Values 390 390 Open Closed Closed Open Closed Closed , ...
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... Table 3: XCR3256XL I/O Pins (Continued) Function Block FT256 CS280 3 164 164 FT256 CS280 3 C16 E18 3 F12 E19 3 D16 F15 3 E14 F17 3 E15 F18 3 - ...
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... R Table 3: XCR3256XL I/O Pins (Continued) Function Macro- Block cell TQ144 PQ208 ...
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... Table 3: XCR3256XL I/O Pins (Continued) Function FT256 CS280 Block ...
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... R Table 3: XCR3256XL I/O Pins (Continued) Function Macro- Block cell TQ144 PQ208 123 122 121 120 119 ...
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... XCR3256XL 256 Macrocell CPLD Table 4: XCR3256XL Global, JTAG, Port Enable, Power, and No Connect Pins Pin Type TQ144 IN0 / CLK0 128 IN1 / CLK1 127 IN2 / CLK2 126 IN3 / CLK3 125 TCK 89 TDI 4 TDO 104 TMS 20 (1) PORT_EN 13 Vcc 24, 50, 51, 58, 73, 76, 95, 115, 123, 130, 144 ...
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... Updated pinout tables; corrected note in 12/11/00 1.4 Updated specifications and pinout tables. 01/17/01 1.5 Removed Timing Model. 03/05/01 1.6 Added 256-ball Fine-Pitch Ball Grid Array Package. DS013 (v1.9) January 8, 2002 Preliminary Product Specification XCR3256XL -7 PQ 208 C Package 256-ball Fine-Pitch Ball Grid Array 208 256 Plastic PQFP Plastic FBGA PQ208 FT256 ...
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... XCR3256XL 256 Macrocell CPLD Date Version 04/11/01 1.7 Added Typical I/V curve, 04/19/01 1.8 Updated Typical I/V curve, 01/08/02 1.9 Moved ICC vs Freq Table, renamed T to match software timing. Added T correct a typo. Updated AC Load Circuit diagram to more closely resemble true test conditions, added note for T 12 Revision Figure 2 ...