XC9572-7TQ100I XILINX [Xilinx, Inc], XC9572-7TQ100I Datasheet - Page 5

• Manufacturer Part Number: XC9572-7TQ100I
• Description: XC9572 In-System Programmable CPLD
• Manufacturer: XILINX [Xilinx, Inc]

Internal Timing Parameters
Note:
December 4, 1998 (Version 3.0)
Buffer Delays
t
t
t
t
t
t
Product Term Control Delays
t
t
t
Internal Register and Combinatorial delays
t
t
t
t
t
t
t
t
Feedback Delays
t
t
Time Adders
t
t
IN
GCK
GSR
GTS
OUT
EN
PTCK
PTSR
PTTS
PDI
SUI
HI
COI
AOI
RAI
LOGI
LOGILP
F
LF
PTA
SLEW
Symbol
3
3. t
PTA
Input buffer delay
GCK buffer delay
GSR buffer delay
GTS buffer delay
Output buffer delay
Output buffer enable/disable delay
Product term clock delay
Product term set/reset delay
Product term 3-state delay
Combinatorial logic propagation delay
Register setup time
Register hold time
Register clock to output valid time
Register async. S/R to output delay
Register async. S/R recovery before clock
Internal logic delay
Internal low power logic delay
FastCONNECT matrix feedback delay
Function Block local feeback delay
Incremental Product Term Allocator delay
Slew-rate limited delay
is multiplied by the span of the function as defined in the family data sheet.
Parameter
Min
1.5
3.0
7.5
XC9572-7
Max
10.0
2.5
1.5
4.5
5.5
2.5
0.0
3.0
2.0
4.5
0.5
0.5
6.5
2.0
8.0
4.0
1.0
4.0
XC9572 In-System Programmable CPLD
10.0
XC9572-10
Min
2.5
3.5
Max
11.0
3.5
2.5
6.0
6.0
3.0
0.0
3.0
2.5
3.5
1.0
0.5
7.0
2.5
9.5
3.5
1.0
4.5
10.0
XC9572-15
Min
3.5
4.5
Max
11.0
11.5
11.0
4.5
3.0
7.5
4.5
0.0
2.5
3.0
5.0
3.0
0.5
8.0
3.0
3.5
1.0
5.0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5