ADSP-1981BL AD [Analog Devices], ADSP-1981BL Datasheet - Page 5

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ADSP-1981BL

Manufacturer Part Number
ADSP-1981BL
Description
AC 97 SoundMAX Codec
Manufacturer
AD [Analog Devices]
Datasheet
Parameter
POWER SUPPLY
CLOCK SPECIFICATIONS
1
2
POWER-DOWN STATES
Values presented with V
Table 3.
Parameter
Fully Active
ADC
DAC
ADC + DAC
Mixer
ADC + Mixer
DAC + Mixer
ADC + DAC + Mixer
Standby
Headphone Standby
TIMING PARAMETERS
Guaranteed over operating temperature range.
Table 4.
Parameter
RESET Active Low Pulse Width
RESET Inactive to BIT_CLK Start-Up Delay
SYNC Active High Pulse Width
SYNC Low Pulse Width
SYNC Inactive to BIT_CLK Start-Up Delay
BIT_CLK Frequency
BIT_CLK Frequency Accuracy
BIT_CLK Period
BIT_CLK Output Jitter
BIT_CLK High Pulse Width
BIT_CLK Low Pulse Width
SYNC Frequency
Guaranteed but not tested.
Measurements reflect main ADC.
Low Level Output Voltage (V
Input Leakage Current
Output Leakage Current
Power Supply Range (AV
Power Dissipation
Analog Supply Current—3.3 V (AV
Digital Supply Current—3.3 V (DV
Power Supply Rejection (100 mV p-p Signal at 1 kHz)
Input Clock Frequency
Recommended Clock Duty Cycle
(At Both Analog and Digital Supply Pins, Both ADCs and DACs)
1, , 2 3
REFOUT
1
DD
not loaded.
and DV
OL
), I
OL
DD
DD
DD
= 2 mA
)
)
)
Set Bits
No Bits Value
PR0
PR1
PR1, PR0
PR2
PR2, PR0
PR2, PR1
PR2, PR1, PR0
PR5, PR4, PR3, PR2, PR1, PR0
PR6
1
Rev. A | Page 5 of 32
Symbol
t
t
t
t
t
t
t
t
RST_LOW
RST2CLK
SYNC_HIGH
SYNC_LOW
SYNC2CLK
CLK_PERIOD
CLK_HIGH
CLK_LOW
Min
−10
−10
3.0
40
DV
47.76
40.1
32.8
13.2
47.7
40
32.77
13.9
0
47.7
DD
Typ
Min
162.8
162.8
32.56
32.56
Typ
2.87
39
48
40
24.576
50
Typ
1.0
1.3
19.5
12.288
81.4
750
42
38
48.0
AV
38.9
34.39
26.3
20.55
19.39
14.86
6.39
1.15
0
32
DD
Max
0.1 × DV
+10
+10
3.47
60
Typ
Max
±1
2000
48.84
AD1981BL
DD
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
ns
ns
ns
ps
ns
ns
Unit
ms
µs
µs
MHz
ppm
kHz
Unit
V
µA
µA
V
mW
mA
mA
dB
MHz
%

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