ADSP-21266_07 AD [Analog Devices], ADSP-21266_07 Datasheet - Page 21
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ADSP-21266_07
Manufacturer Part Number
ADSP-21266_07
Description
Embedded Processor
Manufacturer
AD [Analog Devices]
Datasheet
1.ADSP-21266_07.pdf
(44 pages)
- Current page: 21 of 44
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Timer PWM_OUT Cycle Timing
The timing specification in
Timer in PWM_OUT (pulse-width modulation) mode. Timer
signals are routed to the DAI_P20–1 pins through the SRU.
Therefore, the timing specifications provided below are valid at
the DAI_P20–1 pins.
Table 17. Timer PWM_OUT Timing
Timer WDTH_CAP Timing
The timing specification in
Timer in WDTH_CAP (pulse width count and capture) mode.
Timer signals are routed to the DAI_P20–1 pins through the
SRU. Therefore, the timing specifications provided below are
valid at the DAI_P20–1 pins.
Table 18. Timer Width Capture Timing
Parameter
Switching Characteristic
t
Parameter
Timing Requirement
t
PWMO
PWI
DAI_P20–1
DAI_P20–1
(TIMER)
(TIMER)
Timer Pulse Width Output
Timer Pulse Width
Table 17
Table 18
and
and
Figure 13
Figure 14
Figure 14. Timer Width Capture Timing
Rev. C | Page 21 of 44 | October 2007
applies to
applies to
Figure 13. Timer PWM_OUT Timing
Min
2 × t
Min
2 × t
CCLK
CCLK
t
PWMO
t
PWI
– 1
Max
2(2
Max
2(2
31
31
– 1) × t
– 1) × t
CCLK
CCLK
ADSP-21266
Unit
ns
Unit
ns
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