SAA7120H-01 PHILIPS [NXP Semiconductors], SAA7120H-01 Datasheet - Page 26

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SAA7120H-01

Manufacturer Part Number
SAA7120H-01
Description
Digital Video Encoder (ConDENC)
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
Philips Semiconductors
Explanation of RTCI data bits
1. The ConDENC generates the subcarrier frequency out
2. The PAL bit indicates the line with inverted R - Y
3. If the reset bit is enabled
4. If the FISE bit is enabled (RTCE = 1; DECFIS = 1), the
5. If the odd/even bit is enabled (RTCE = 1; DECOE = 1),
1997 Jan 06
handbook, full pagewidth
Digital Video Encoder (ConDENC)
RTCI
(1) SAA7111 provides (22:0) bits, resulting in 3 reserved bits before
(2) Sequence bit
of the FSCPLL increment if enabled (see item 6.).
component of colour difference signal.
(RTCE = 1; DECPH = 1; PHRES = 00), the phase of
the subcarrier is reset in each line whenever the reset
bit of RTCI input is set to 1.
ConDENC takes this bit instead of the FISE bit in
subaddress 61H.
the ConDENC ignores its internally generated
odd/even flag and takes the odd/even bit from RTCI
input.
sequence bit.
PAL: 0 = (R Y) line normal, 1 = (R Y) line inverted
NTSC: 0 = no change.
H/L transition
count start
128
time slot:
LOW
0 1
13
not used in SAA7120/21
increment
HPLL
14
0
reserved
4 bits
19
Fig.10 RTCI timing.
21
(7)
26
(3) Reset bit: only from SAA7111 decoder.
(4) FISE bit: 0 = 50 Hz, 1 = 60 Hz.
(5) Odd/even bit: odd/even from external.
(6) Colour detection: 0 = no colour detected, 1 = colour detected.
(7) Reserved bits: 232 with 50 Hz systems, 229 with 60 Hz systems.
6. If the colour detection bit is enabled (RTCE = 1;
sample
FSCPLL increment
DECCOL = 1) and no colour was detected (colour
detection bit = 0), the subcarrier frequency is
generated by the ConDENC. In the other case (colour
detection bit = 1) the subcarrier frequency is evaluated
out of FSCPLL increment.
If the colour detection bit is disabled (RTCE = 1;
DECCOL = 0), the subcarrier frequency is evaluated
out of FSCPLL increment, independent of the colour
detection bit of RTCI input.
valid
sample
invalid
(1)
SAA7120; SAA7121
reserved
8/LLC
5 bits
Preliminary specification
(7)
0
67 69 72 74
68
(2)
MBH789
(3)
(4)
(5)
(6)

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