SAA7183AWP PHILIPS [NXP Semiconductors], SAA7183AWP Datasheet - Page 22
SAA7183AWP
Manufacturer Part Number
SAA7183AWP
Description
Digital Video Encoder EURO-DENC2
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.SAA7183AWP.pdf
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Philips Semiconductors
Table 18 Subaddress 61:
1996 Oct 02
FISE
PAL
SCBW
SECAM
YGS
INPI
DOWNA
DOWNB
DATA BYTE
Digital Video Encoder (EURO-DENC2)
LOGIC LEVEL
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
864 total pixel clocks per line; default after reset
858 total pixel clocks per line
PAL encoding (alternating V component); default after reset
enlarged bandwidth for chrominance encoding (for overall transfer characteristic of
chrominance in baseband representation see Figs 5 and 6); wide clipping for
SECAM
standard bandwidth for chrominance encoding (for overall transfer characteristic of
chrominance in baseband representation see Figs 5 and 6); default after reset
no SECAM encoding; default after reset
SECAM encoding activated
luminance gain for white
luminance gain for white
PAL switch phase is nominal; default after reset
PAL switch phase is inverted compared to nominal
DACs for CVBS, Y and C in normal operational mode; default after reset
DACs for CVBS, Y and C forced to lowest output voltage
DACs for R, G and B in normal operational mode; default after reset
DACs for R, G and B forced to lowest output voltage
NTSC encoding (non-alternating V component)
22
black 100 IRE; default after reset
black 92.5 IRE including 7.5 IRE set-up of black
DESCRIPTION
SAA7182A; SAA7183A
Preliminary specification
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