XC3S100E-4CP132C XILINX [Xilinx, Inc], XC3S100E-4CP132C Datasheet - Page 4
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XC3S100E-4CP132C
Manufacturer Part Number
XC3S100E-4CP132C
Description
Spartan-3E FPGA Family
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
1.XC3S100E-4CP132C.pdf
(193 pages)
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Configuration
Spartan-3E FPGAs are programmed by loading configura-
tion data into robust, reprogrammable, static CMOS config-
uration latches (CCLs) that collectively control all functional
elements and routing resources. The FPGA’s configuration
data is stored externally in a PROM or some other non-vol-
atile medium, either on or off the board. After applying
power, the configuration data is written to the FPGA using
any of seven different modes:
•
•
•
•
•
•
Table 2: Available User I/Os and Differential (Diff) I/O Pairs
DS312-1 (v1.1) March 21, 2005
Advance Product Specification
Notes:
1.
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
Device
Master Serial from a Xilinx Platform Flash PROM
Serial Peripheral Interface (SPI) from an
industry-standard SPI serial Flash
Byte Peripheral Interface (BPI) Up or Down from an
industry-standard x8 or x8/x16 parallel NOR Flash
Slave Serial, typically downloaded from a processor
Slave Parallel, typically downloaded from a processor
Boundary Scan (JTAG), typically downloaded from a
processor or system tester.
All Spartan-3E devices in the same package are pin-compatible.
R
User
66
66
VQG100
-
-
-
VQ100
Diff
30
30
-
-
-
User
92
92
CPG132
-
-
-
CP132
Diff
41
41
-
-
-
User
108
108
TQG144
-
-
-
TQ144
Diff
40
40
-
-
-
www.xilinx.com
User
158
158
PQG208
-
-
-
PQ208
I/O Capabilities
The Spartan-3E FPGA SelectIO interface supports many
popular single-ended and differential standards.
shows the number of user I/Os as well as the number of dif-
ferential I/O pairs available for each device/package combi-
nation.
Spartan-3E FPGAs support the following single-ended
standards:
•
•
•
•
•
Spartan-3E FPGAs support the following differential stan-
dards:
•
•
•
•
Diff
65
65
-
-
-
3.3V, low-voltage TTL, LVTTL
Low-voltage CMOS (LVCMOS) at 3.3V, 2.5V, 1.8V,
1.5V, or 1.2V
3.3V PCI at 33 MHz and 66 MHz
HSTL I and III at 1.8V, typically for memory applications
SSTL I at 1.8V and 2.5V, typically for memory
applications
LVDS
Bus LVDS
mini-LVDS
RSDS
User
172
190
190
FTG256
-
-
FT256
Diff
68
77
77
-
-
Introduction and Ordering Information
User
250
232
250
FGG320
-
-
FG320
Diff
92
99
99
-
-
User
304
304
FGG400
-
-
-
FG400
Diff
124
124
-
-
-
User
376
FGG484
-
-
-
-
FG484
Table 2
Diff
156
-
-
-
-
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