STA2500DTR STMICROELECTRONICS [STMicroelectronics], STA2500DTR Datasheet - Page 13

• Manufacturer Part Number: STA2500DTR
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STA2500D
4
4.1
Pinout
Figure 2.
Pin description and assignment
Table 13
In columns “Reset” and “Default after reset”, the “PD/PU” shows the pads implementing an
internal pull-down/up.
The column “Reset” shows the state of the pins during hardware reset; the column “Default
after reset” shows the state of the pins after the hardware reset state is left, but before any
software parameter download.
The column “Type” describes the pin directions:
–
–
–
–
shows the pin list of the STA2500D.
I for Input (All inputs have a Schmitt trigger function.)
O for Output
I/O for Input/Output
O/t for tri-state output
Pinout (bottom view)
A
B
C
D
E
F
G
BT_CLK_REQ_OUT_2
BT_HOST_WAKEUP
BT_VDD_DSM
BT_VDD_CLD
BT_VDD_CL
/BT_SPI_INT
BT_VDD_N
GPIO_3
BT_HVA
7
BT_CLK_REQ_IN_1
BT_REF_CLK_IN
BT_CLK_REQ_IN_2
BT_UART_TXD
/ BT_SPI_DO
BT_VSSANA
BT_VSSANA
BT_TEST2
Doc ID 16067 Rev 1
6
BT_UART_RXD
BT_WAKEUP
BT_AF_PRG
/ BT_SPI_DI
BT_GPIO_0
BT_VSSRF
BT_TEST1
BT_VIO_A
GPIO_0
5
BT_CLK_REQ_OUT_1
BT_UART_RTS
BT_UART_CTS
/ BT_SPI_CLK
/ BT_SPI_CS
BT_VSSANA
BT_VSSDIG
BT_RFN
4
BT_GPIO_16
JTAG_TCK
BT_GPIO_8
BT_RESETN
BT_VSSDIG
BT_LP_CLK
BT_VIO_B
BT_RFP
3
BT_PCM_SYNC
BT_CONFIG_1
BT_CONFIG_3
BT_GPIO_11
BT_PCM_A
BT_VDD_D
BT_VSSRF
2
BT_CONFIG_2
BT_PCM_CLK
BT_GPIO_10
BT_VDD_RF
BT_GPIO_9
BT_PCM_B
BT_HVD
1
Pinout
13/57