KSZ8862-16_10 MICREL [Micrel Semiconductor], KSZ8862-16_10 Datasheet - Page 84
KSZ8862-16_10
Manufacturer Part Number
KSZ8862-16_10
Description
2-Port Ethernet Switch with Non-PCI Interface and Fiber Support
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KSZ8862-16_10.pdf
(125 pages)
- Current page: 84 of 125
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Bank 46 PHY 2 MII-Register Basic Control Register (0x00): P2MBCR
This register contains Media Independent Interface (MII) control for the switch function as defined in the IEEE 802.3
specification.
Micrel, Inc.
August 2010
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Default
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
R/W
RO
RW
RW
RW
RW
RO
RW
RW
RO
RO
R/W
RW
RW
RW
RW
RW
Description
Soft reset
Not supported.
Far-End Loopback
1 = perform loop back, as indicated (see Figure14):
0 = normal operation.
Force 100
1 = 100 Mbps.
0 = 10 Mbps.
AN Enable
1 = auto-negotiation enabled.
0 = auto-negotiation disabled.
Power Down
1 = power down.
0 = normal operation.
Isolate
Not supported.
Restart AN
1 = restart auto-negotiation.
0 = normal operation,
Force Full Duplex
1 = full duplex.
0 = half duplex.
Collision test
Not supported.
Reserved
HP_mdix
1 = HP Auto MDI-X mode.
0 = Micrel Auto MDI-X mode.
Force MDI-X
1 = force MDI-X.
0 = normal operation.
Disable MDI-X
1 = disable auto MDI-X.
0 = normal operation.
Reserved
Disable Transmit
1 = disable transmit.
0 = normal operation.
Disable LED
1 = disable LED.
0 = normal operation.
Start: RXP1/RXM1 (port 1)
Loop back: PMD/PMA of port 2’s PHY
End: TXP1/TXM1 (port 1)
84
Bit is same as:
Bank 51 0x02 bit 8
Bank 51 0x02 bit 6
Bank 51 0x02 bit 7
Bank 51 0x02 bit 11
Bank 51 0x02 bit 13
Bank 51 0x02 bit 5
Bank 51 0x04 bit 15
Bank 51 0x02 bit 9
Bank 51 0x02 bit 10
Bank 51 0x02 bit 12
Bank 51 0x02 bit 14
Bank 51 0x02 bit 15
KSZ8862-16/32MQL
M9999-081310-3.1
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