AT43USB355M-AC ATMEL [ATMEL Corporation], AT43USB355M-AC Datasheet - Page 24
AT43USB355M-AC
Manufacturer Part Number
AT43USB355M-AC
Description
Full-speed USB Microcontroller with Embedded Hub, ADC and PWM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT43USB355M-AC.pdf
(115 pages)
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External Reset
Watchdog Timer
Reset
Non-USB Related
Interrupt Handling
24
AT43USB355
An external reset is generated by a low-level on the RESETN pin. Reset pulses longer than
200 ns will generate a reset. Shorter pulses are not guaranteed to generate a reset. When the
applied signal reaches the Reset Threshold Voltage - V
starts the MCU after the Time-out period t
Figure 10. External Reset During Operation
When the watchdog times out, it will generate a short reset pulse of 1 XTAL cycle duration. On
the falling edge of this pulse, the delay timer starts counting the Time-out period t
Figure 11. Watchdog Reset During Operation
The AT43USB355 has two non-USB 8-bit Interrupt Mask control registers; GIMSK (General
Interrupt Mask Register) and TIMSK (Timer/Counter Interrupt Mask Register).
When an interrupt occurs, the Global Interrupt Enable I-bit is cleared (zero) and all interrupts
are disabled. The user software can set (one) the I-bit to enable nested interrupts. The I-bit is
set (one) when a Return from Interrupt instruction, RETI, is executed.
For Interrupts triggered by events that can remain static (e.g. the Output Compare register1
matching the value of Timer/Counter1) the interrupt flag is set when the event occurs. If the
interrupt flag is cleared and the interrupt condition persists, the flag will not be set until the
event occurs the next time.
When the Program Counter is vectored to the actual interrupt vector in order to execute the
interrupt handling routine, hard-ware clears the corresponding flag that generated the inter-
rupt. Some of the interrupt flags can also be cleared by writing a logic one to the flag bit
position(s) to be cleared.
INTERNAL
TIME-OUT
TIME-OUT
INTERNAL
TIME-OUT
RESET
RESET
RESET
WDT
RESET
RESET
VCC
VCC
V
RST
1 XTAL Cycle
t
TOUT
t
TOUT
TOUT
has expired.
RST
on its positive edge, the delay timer
2603G–USB–04/06
TOUT
.
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