MPC8264 MOTOROLA [Motorola, Inc], MPC8264 Datasheet - Page 6

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MPC8264

Manufacturer Part Number
MPC8264
Description
MPC826xA (HiP4) Family Hardware Specifications
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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1.2
This section provides AC and DC electrical specifications and thermal characteristics for the MPC826xA.
6
— Supports TC-layer and PMD-WIRE interface (according to the ATM-Forum af-phy-0063.000)
— Cell counters for performance monitoring
— Overrun (Rx cell FIFO) and underrun (Tx cell FIFO) condition produces maskable interrupt
— May be operated at E1 and DS-1 rates. In addition, xDSL applications at bit rates up to 10 Mbps
PCI bridge (MPC8265 and MPC8266 only)
— PCI Specification Revision 2.2 compliant and supports frequencies up to 66 MHz
— On-chip arbitration
— Support for PCI to 60x memory and 60x memory to PCI streaming
— PCI Host Bridge or Periphera
— Includes 4 DMA channels for the following transfers:
— Includes all of the configuration registers (which are automatically loaded from the EPROM
— Supports the I
— Hot-Swap friendly (supports the Hot Swap Specification as defined by PICMG 2.1 R1.0
— Support for 66 MHz, 3.3 V specification
— 60x-PCI bus core logic which uses a buffer pool to allocate buffers for each port
— Makes use of the local bus signals, so there is no need for additional pins
Electrical and Thermal Characteristics
– Internal rate mode (sub-rate)—FCC transfers only the data cells using the required data rate.
– 16-bit counters count
– Maskable interrupt is sent to the host when a counter expires
are supported
– PCI-to-60x to 60x-to-PCI
– 60x-to-PCI to PCI-to-60x
– PCI-to-60x to PCI-to-60x
– 60x-to-PCI to 60x-to-PCI
and used to configure the MPC8265) required by the PCI standard as well as message and
doorbell registers
August 3, 1998)
The TC layer generates idle/unassigned cells to maintain the line bit rate.
– HEC error cells
– HEC single bit error and corrected cells
– Idle/unassigned cells filtered
– Idle/unassigned cells transmitted
– Transmitted ATM cells
– Received ATM cells
2
MPC826xA (HiP4) Family Hardware Specifications
O standard
l
capabilities
MOTOROLA

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