MC68HC08JB8A MOTOROLA [Motorola, Inc], MC68HC08JB8A Datasheet - Page 5

• Manufacturer Part Number: MC68HC08JB8A
• Description: This addendum provides additional information to the MC68HC908JB8 Technical Data, Rev. 2
• Manufacturer: MOTOROLA [Motorola, Inc]

Memory
Characteristics
MOTOROLA
I/O ports Hi-Z leakage current
Input current
Capacitance
POR re-arm voltage
POR rise-time ramp rate
Monitor mode entry voltage
Pullup resistors
LVI reset
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) I
4. Wait I
5. STOP I
6. Maximum is highest voltage that POR is guaranteed.
7. If minimum V
8. The numbers in parenthesis are MC68HC08JB8 (non-A part) values.
Ports (as input or output)
Port A, port B, port C, PTE0–PTE2, RST, IRQ
PTE3–PTE4 (with USB module disabled)
D– (with USB module enabled)
loads. Less than 100 pF on all outputs. C
affects run I
than 100 pF on all outputs. C
as inputs; OSC2 capacitance linearly affects wait I
and D– pins and 15 kΩ ± 5% termination resistor on D+ pin; no port pins sourcing current.
V
DD
REG
RAM data retention voltage
Notes:
= 4.0 to 5.5 Vdc, V
Since MC68HC08JB8A is a ROM device, FLASH memory electrical characteristics do not apply.
DD
is reached.
DD
measured using external square wave clock source (f
measured with USB in suspend mode; OSC1 grounded; transceiver pullup resistor of 1.5 kΩ ± 5% between V
DD
REG
. Measured with all modules enabled.
Characteristic
DD
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
(6)
measured using external square wave clock source (f
SS
Characteristic
(7)
= 0 Vdc, T
L
= 20 pF on OSC2; 15 kΩ ± 5% termination resistors on D+ and D– pins; all ports configured
Freescale Semiconductor, Inc.
(1)
Addendum to MC68HC908JB8 Technical Data
For More Information On This Product,
Table 2. DC Electrical Characteristics
A
Table 3. Memory Characteristics
= T
L
L
to T
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
Go to: www.freescale.com
H
, unless otherwise noted.
DD
Symbol
V
V
R
DD
V
C
R
C
I
POR
POR
I
LVR
IN
Out
IL
PU
+
XCLK
In
V
HI
= 6 MHz); all inputs 0.2 V from rail; no dc loads; less
Symbol
V
RDR
1.4 × V
2.8 (2.4)
XCLK
0.035
Min
1.2
25
—
—
—
—
0
4
= 6 MHz). All inputs 0.2 V from rail. No dc
DD
Min
1.3
3.3 (2.7)
Typ
1.5
40
—
—
—
—
—
—
5
(2)
Max
—
3.8 (3.0)
2 × V
Max
± 10
100
± 1
2.0
12
55
—
8
6
MC68HC08JB8A
DD
HC908JB8AD/D
Unit
(8)
V
V/ms
Unit
mV
µ A
µ A
k Ω
pF
REG
V
V
5