MC68HC11E1 MOTOROLA [Motorola, Inc], MC68HC11E1 Datasheet - Page 39

• Manufacturer Part Number: MC68HC11E1
• Description: M68HC11E Series Programming Reference Guide
• Manufacturer: MOTOROLA [Motorola, Inc]

Pulse Accumulator Control (PACTL)
MOTOROLA
DDRA7 — Data Direction for Port A Bit 7
PAEN — Pulse Accumulator System Enable
PAMOD — Pulse Accumulator Mode
PEDGE — Pulse Accumulator Edge Control
DDRA3 — Data Direction for Port A Bit 3
I4/O5 — Input Capture 4/Output Compare 5
RTR[1:0] — Real-Time Interrupt (RTI) Rate
Address:
Reset:
M68HC11E Series Programming Reference Guide
Refer to the following table.
Overridden if an output compare function is configured to control the PA3
pin.
Configure TI4/O5 for input capture or output compare
Refer to the following table.
Read:
Write:
0 = Input only
1 = Output
0 = Pulse accumulator disabled
1 = Pulse accumulator enabled
0 = Event counter
1 = Gated time accumulation
0 = Input
1 = Output
0 = OC5 enabled
1 = IC4 enabled
PAMOD
RTR1
0
0
1
1
0
0
1
1
DDRA7
$1026
Bit 7
0
RTR0
0
1
0
1
PAEN
PEDGE
6
0
0
1
0
1
E = 3 MHz
10.923 ms
21.845 ms
2.731 ms
5.461 ms
PAMOD
5
0
PAI falling edge increments the counter.
PAI rising edge increments the counter.
A zero on PAI inhibits counting.
A one on PAI inhibits counting.
E = 2 MHz
16.384 ms
32.768 ms
4.096 ms
8.192 ms
PEDGE
4
0
DDRA3
Action on Clock
3
0
E = 1 MHz
16.384 ms
32.768 ms
65.536 ms
8.192 ms
I4/O5
M68HC11E Series Registers
2
0
E = X MHz
(E/2
(E/2
(E/2
(E/2
RTR1
M68HC11ERG/AD
1
0
13
14
15
16
)
)
)
)
RTR0
Bit 0
0
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