W682510_05 WINBOND [Winbond], W682510_05 Datasheet - Page 14
W682510_05
Manufacturer Part Number
W682510_05
Description
DUAL-CHANNEL VOICEBAND CODECS
Manufacturer
WINBOND [Winbond]
Datasheet
1.W682510_05.pdf
(35 pages)
- Current page: 14 of 35
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When the power up indicator pin, PUI, is set LOW all internal circuits will go into the power down state.
It will take 2 to 10 milliseconds for the PLL to lock when operation is resumed with the FST and BCLK
signals applied and PUI set HIGH. An additional 1-millisecond delay is used to set the analog outputs
to the signal ground reference in order to avoid power up glitches. The digital open drain outputs will
remain at high impedance during this power up delay.
The following table shows the states of the output pins in the power save or power down mode.
7.5.2. Power Down Mode
7.5.3. Power Save/Down Output pin state
Product Name
W682510
W682310
TABLE 7.5: OUTPUT PIN STATES
AO1-, A02-
V
High Z
SSA
- 14 -
Output Pin
RO1, RO2
Signal Ground
Signal Ground
W682510/W682310
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