TP3069V NSC [National Semiconductor], TP3069V Datasheet
TP3069V
Related parts for TP3069V
TP3069V Summary of contents
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TP3069 ‘‘Enhanced’’ Serial Interface CMOS CODEC Filter COMBO General Description The TP3069 (A-law monolithic PCM CODEC Filter uti- lizing the A D and D A conversion architecture shown in Figure 1 and a serial PCM interface The device ...
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... R continuously high the device is powered down Order Number TP3069J See NS Package Number J20A Order Number TP3069N See NS Package Number N20A Order Number TP3069V TL H 10578–2 See NS Package Number V20A Order Number TP3069WM See NS Package Number M20B Symbol MCLK Transmit master clock Must be 1 536 MHz ...
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Functional Description POWER-UP When power is first applied power-on reset circuitry initializ- es the COMBO TM and places it into a power-down state All non-essential circuits are deactivated and the D VPO b and VPO a outputs are put in ...
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Functional Description (Continued) The FS frame sync pulse controls the sampling of the filter X output and then the successive-approximation encoding cy- cle begins The 8-bit code is then loaded into a buffer and shifted out through D at the ...
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Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications V to GNDA GNDA BB Voltage at any Analog Input or Output ...
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Electrical Characteristics Unless otherwise noted limits printed in BOLD characters are guaranteed for correlation with 100% electrical testing at T production tests and or product design and characterization All signals referenced to GNDA ...
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Timing Specifications Unless otherwise noted limits printed in BOLD characters are guaranteed for correlation with 100% electrical testing at T production tests and or product design and characterization All signals are referenced to ...
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Timing Diagrams 8 ...
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Timing Diagrams (Continued) 9 ...
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Transmission Characteristics Unless otherwise noted limits printed in BOLD characters are guaranteed for correlation with 100% electrical testing at T production tests and or product design and characterization GNDA connected for unity gain ...
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Transmission Characteristics Unless otherwise noted limits printed in BOLD characters are guaranteed for correlation with 100% electrical testing at T production tests and or product design and characterization GNDA connected for unity gain ...
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Transmission Characteristics Unless otherwise noted limits printed in BOLD characters are guaranteed for correlation with 100% electrical testing at T production tests and or product design and characterization GNDA connected for unity gain ...
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Applications Information POWER SUPPLIES While the pins of the TP3060 family are well protected against electrical misuse it is recommended that the stan- dard CMOS practice be followed ensuring that ground is connected to the device before any other connections ...
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Definitions and Timing Conventions DEFINITIONS the d c input level above which input level is guaranteed to appear as a logical one This parameter measured by performing a functional test at ...
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Physical Dimensions inches (millimeters) Cavity Dual-In-Line Package (J) Order Number TP3069J NS Package Number J20A 16 ...
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Physical Dimensions inches (millimeters) (Continued) Molded Small Outline Package (WM) 20 Lead (0 300 Wide) Order Number TP3069WM NS Package Number M20B Molded Dual-In-Line Package (N) Order Number TP3069N NS Package Number N20A 17 ...
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... National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications Plastic Chip Carrier (V) Order Number TP3069V NS Package Number V20A 2 A critical component is any component of a life ...