LAN9215I-MT-E2 SMSC [SMSC Corporation], LAN9215I-MT-E2 Datasheet - Page 90

• Manufacturer Part Number: LAN9215I-MT-E2
• Description: Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.5 (07-18-06)
5.3.16
5.3.17
31-16
BITS
BITS
15-0
31:0
Reserved
General Purpose Timer Current Count (GPT_CNT). This 16-bit field
reflects the current value of the GP Timer.
Word Swap. If this field is set to 00000000h, or anything except
0xFFFFFFFFh, the LAN9215I maps words with address bit A[1]=1 to the
high order words of the CSRs and Data FIFOs, and words with address bit
A[1]=0 to the low order words of the CSRs and Data FIFOs. If this field is
set to 0xFFFFFFFFh, the LAN9215I maps words with address bit A[1]=1 to
the low order words of the CSRs and Data FIFOs, and words with address
bit A[1]=0 to the high order words of the CSRs and Data FIFOs.
GPT_CNT-General Purpose Timer Current Count Register
This register reflects the current value of the GP Timer.
WORD SWAP—Word Swap Control
This register controls how words from the host data bus are mapped to the CSRs and Data FIFOs
inside the LAN9215I. The LAN9215I always sends data from the Transmit Data FIFO to the network
so that the low order word is sent first, and always receives data from the network to the Receive Data
FIFO so that the low order word is received first.
Offset:
Offset:
DESCRIPTION
DESCRIPTION
Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
90h
98h
DATASHEET
90
Size:
Size:
32 bits
32 bits
NASR
TYPE
TYPE
R/W
RO
RO
SMSC LAN9215I
00000000h
DEFAULT
DEFAULT
FFFFh
Datasheet
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