FDC37M600 SMSC [SMSC Corporation], FDC37M600 Datasheet - Page 104

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FDC37M600

Manufacturer Part Number
FDC37M600
Description
ENHANCED SUPER I/O CONTROLLER WITH INFRARED SUPPORT
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Register Behavior
Table 44 reiterates the AT and PS/2 (including
Model 30) configuration registers available. It
also shows the type of access permitted.
order to maintain software transparency, access
to all the registers must be maintained. As Table
45 shows, two sets of registers are distinguished
based on whether their access results in the part
remaining in powerdown state or exiting it.
Access to all other registers is possible without
awakening the part.
accessed during powerdown without changing
the status of the part.
registers will reflect the true status as shown in
the register description in the FDC description. A
write to the part will result in the part retaining
the data and subsequently reflecting it when the
part awakens.
powerdown may cause an increase in the power
consumption by the part. The part will revert
back to its low power mode when the access
has been completed.
Accessing the part during
These registers can be
A read from these
In
104
Pin Behavior
The FDC37M60x is specifically designed for
portable
conservation is a primary concern. This makes
the behavior of the pins during powerdown very
important.
The pins of the FDC37M60x can be divided into
two major categories:
floppy disk drive interface. The floppy disk drive
pins are disabled so that no power will be drawn
through the part as a result of any voltage
applied to the pin within the part's power supply
range. Most of the system interface pins are left
active to monitor system accesses that may
wake up the part.
System Interface Pins
Table 45 gives the state of the system interface
pins in the powerdown state. Pins unaffected by
the powerdown are labeled "Unchanged". Input
pins are "Disabled" to prevent them from
causing currents internal to the FDC37M60x
when they have indeterminate input values.
PC
systems
system interface and
in
which
power

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