LPC47N267_05 SMSC [SMSC Corporation], LPC47N267_05 Datasheet
LPC47N267_05
Related parts for LPC47N267_05
LPC47N267_05 Summary of contents
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PRODUCT FEATURES 3.3 Volt Operation (5V tolerant) Programmable Wakeup Event Interface (IO_PME# Pin) SMI Support (IO_SMI# Pin) GPIOs (29) Four IRQ Input Pins X-Bus Interface — Supports external components — Supports I/O cycles (No Memory Support) — ...
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ORDER NUMBER(S): LPC47N267-MN FOR 100 PIN, STQFP PACKAGE 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © 2005 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included ...
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Pin LPC Super I/O with X-Bus Interface General Description The SMSC LPC47N267 and ACPI 1.0 compliant Super I/O Controller. The LPC47N267 implements an LPC interface, a pin reduced ISA interface, for supported I/O and ...
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Block Diagram nIO_SMI* SMI PME WDT XD[0:7]* XCS0#* XCS1#* X-BUS XCS2#* INTERFACE XRD#* XWR#* XA0* XA1* XA2* XA3/XCS3#* SER_IRQ SERIAL IRQ PCI_CLK LAD0 LAD1 LAD2 LPC BUS INTERFACE LAD3 nLFRAME nLDRQ nPCI_RESET nLPCPD nCLKRUN CLOCK GEN CLOCKI V Vcc Vss ...
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Pin LPC Super I/O with X-Bus Interface Package Outline Figure 2 100 Pin STQFP, 12X12X1.4 Body, 2.0 MM Footprint Table 1 100 Pin STQFP Package Parameters MIN NOMINAL 0. 1.35 1.40 D 13.80 ...