UJA1069TW PHILIPS [NXP Semiconductors], UJA1069TW Datasheet - Page 20

• Manufacturer Part Number: UJA1069TW
• Description: LIN fail-safe system basis chip
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
UJA1069_2
Preliminary data sheet
Fig 11. States of the RTLIN pin
6.7.3 Termination control
6.7.4 LIN slope control
supplied directly
RTLIN = ON
out of BAT42
The RTLIN pin is in one of 3 different states: RTLIN = on, RTLIN = off or RTLIN = 75 A;
see
mode change to Active mode
During Active mode, with no short-circuit between the LIN-bus and GND, pin RTLIN
provides an internal switch to BAT42. For master and slave operation an external resistor,
1 k or 30 k respectively, can be applied between pins RTLIN and LIN. An external
diode in series with the termination resistor is not required due to the incorporated internal
diode.
The LSC bit in the Physical Layer Control register offers a choice between two LIN slope
times, allowing communication up to 20 kbit/s (normal) or up to 10.4 kbit/s (low slope).
Fig 10. LIN wake-up timing diagram
Figure
power-on
11.
Active mode and receiver dominant
Active mode and receiver recessive
wake-up
OR mode change to Active mode
Rev. 02 — 5 March 2007
LIN
OR Off-line mode
RTLIN = OFF
AND receiver recessive
t BUS(LIN)
t
t
Off-line mode
LIN(dom)(det)
LIN(dom)(rec)
AND receiver dominant
t
LIN(dom)(rec)
Off-line mode
001aad183
LIN fail-safe system basis chip
001aad447
RTLIN = 75 A
supplied directly
t
LIN(dom)(det)
out of BAT42
UJA1069
© NXP B.V. 2007. All rights reserved.
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