MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 33
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MC68HC908JK3
Manufacturer Part Number
MC68HC908JK3
Description
MC68HC908JK1
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3.pdf
(210 pages)
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MC68H(R)C908JL3
MOTOROLA
Note: Writing a logic 0 clears SBSW.
Addr.
$003C
$003D
$FE00
$FE01
$FE02
$FE03
$FE04
$002B
$003B
$003E
$003F
Interrupt Status Register 1
ADC Input Clock Register
ADC Status and Control
Break Status Register
Reset Status Register
Register Name
ADC Data Register
Break Flag Control
Unimplemented
Unimplemented
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 5)
—
(ADICLK)
Reserved
(ADSCR)
Register
Register
(BFCR)
Rev. 1.0
(INT1)
(ADR)
(RSR)
(BSR)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
POR:
COCO
ADIV2
BCFE
Bit 7
POR
AD7
R
R
R
0
0
1
0
0
0
= Unimplemented
ADIV1
AIEN
AD6
PIN
IF5
R
R
R
R
6
0
0
0
0
Memory
ADCO
ADIV0
COP
AD5
IF4
R
R
R
R
5
0
0
0
0
Indeterminate after reset
ILOP
CH4
AD4
IF3
R
R
R
R
4
1
0
0
0
0
ILAD
CH3
AD3
R
R
R
R
R
3
1
0
0
0
0
0
MODRST
= Reserved
CH2
AD2
IF1
R
R
R
R
2
1
0
0
0
0
See note
SBSW
CH1
AD1
LVI
R
R
R
1
1
0
0
0
0
0
0
Technical Data
Monitor ROM
Memory
Bit 0
CH0
AD0
R
R
R
R
1
0
0
0
0
0
0
33