AT89LP216-20PI ATMEL [ATMEL Corporation], AT89LP216-20PI Datasheet - Page 54

• Manufacturer Part Number: AT89LP216-20PI
• Description: Microcontroller with 2K Bytes Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Figure 18-4. SPI Transfer Format with CPHA = 0
Note:
Figure 18-5. SPI Transfer Format with CPHA = 1
Note:
54
*Not defined but normally MSB of character just received.
*Not defined but normally LSB of previously transmitted character.
(FOR REFERENCE)
AT89LP216 [Preliminary]
(FROM MASTER)
SCK (CPOL = 0)
SCK (CPOL = 1)
SS (TO SLAVE)
(FROM SLAVE)
SCK CYCLE #
MOSI
MISO
The CPHA (Clock PHAse), CPOL (Clock POLarity), and SPR (Serial Peripheral clock Rate =
baud rate) bits in SPCR control the shape and rate of SCK. The two SPR bits provide four possi-
ble clock rates when the SPI is in master mode. In slave mode, the SPI will operate at the rate of
the incoming SCK as long as it does not exceed the maximum bit rate. There are also four pos-
sible combinations of SCK phase and polarity with respect to the serial data. CPHA and CPOL
determine which format is used for transmission. The SPI data transfer formats are shown in
Figures 18-4 and
and SPR should not be modified while the interface is enabled, and the master device should be
enabled before the slave device(s).
*
MSB
MSB
1
18-5. To prevent glitches on SCK from disrupting the interface, CPHA, CPOL,
2
6
6
3
5
5
4
4
4
5
3
3
6
2
2
7
1
1
8
LSB
LSB
3621A–MICRO–6/06