MAX2065 MAXIM [Maxim Integrated Products], MAX2065 Datasheet

MAX2065

Manufacturer Part Number

MAX2065

Description

50MHz to 1000MHz High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA

Manufacturer

MAXIM [Maxim Integrated Products]

Datasheet

1.MAX2065.pdf (27 pages)

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The MAX2065 high-linearity, analog/digital variable-

gain amplifier (VGA) is designed to operate in the

50MHz to 1000MHz frequency range with two indepen-

dent attenuators (see the Typical Application Circuit ).

The digital attenuator is controlled as a slave peripheral

using either the SPI™-compatible interface or a parallel

bus with 31dB total adjustment range in 1dB steps. An

added feature allows “rapid-fire” gain selection

between each of four steps, preprogrammed by the

user through the SPI-compatible interface. The 2-pin

control allows the user to quickly access any one of

four customized attenuation states without reprogram-

ming the SPI bus. The analog attenuator is controlled

using an external voltage or through the SPI-compatible

interface using an on-chip 8-bit DAC.

Because each of the three stages has its own RF input

and RF output, this component can be configured to

either optimize NF (amplifier configured first), OIP3 (ampli-

fier last), or a compromise of NF and OIP3. The device’s

performance features include 22dB amplifier gain (ampli-

fier only), 6.5dB NF at maximum gain (includes attenuator

insertion losses), and a high OIP3 level of +42dBm. Each

of these features makes the MAX2065 an ideal VGA for

numerous receiver and transmitter applications.

In addition, the MAX2065 operates from a single +5V

supply with full performance, or a single +3.3V supply

with slightly reduced performance, and has an

adjustable bias to trade current consumption for linearity

performance. This device is available in a compact 40-

pin thin QFN package (6mm x 6mm) with an exposed

pad. Electrical performance is guaranteed over the

extended temperature range (T

19-3131; Rev 0; 3/08

SPI is a trademark of Motorola, Inc.

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

IF and RF Gain Stages

Temperature Compensation Circuits

Cellular Band WCDMA and cdma2000

Stations

GSM 850/GSM 900 EDGE Base Stations

WiMAX and LTE Base Stations and Customer

Premise Equipment

Fixed Broadband Wireless Access

Wireless Local Loop

Military Systems

Video-on-Demand (VOD) and DOCSIS

Compliant EDGE QAM Modulation

Cable Modem Termination Systems (CMTS)

50MHz to 1000MHz High-Linearity, Serial/

________________________________________________________________ Maxim Integrated Products

Parallel-Controlled Analog/Digital VGA

General Description

= -40°C to +85°C).

Applications

Base

♦ 50MHz to 1000MHz RF Frequency Range

♦ Pin-Compatible Family Includes:

♦ +19.4dB (Typ) Maximum Gain

♦ 0.5dB Gain Flatness Over 100MHz Bandwidth

♦ 62dB Gain Range (31dB Analog + 31dB Digital)

♦ Built-in DAC for Analog Attenuation Control

♦ Supports Four “Rapid-Fire” Preprogrammed

♦ Excellent Linearity (Configured with Amplifier

♦ 6.5dB Typical Noise Figure (NF)

♦ Fast, 25ns Digital Switching

♦ Very Low Digital VGA Amplitude Overshoot/

♦ Single +5V Supply (Optional +3.3V Operation)

♦ External Current-Setting Resistors Provide Option

+ Denotes a lead-free package.

* EP = Exposed pad.

T = Tape and reel.

Pin Configuration appears at end of data sheet.

cdma2000 is a registered trademark of Telecommunications

Industry Association.

DOCSIS and CableLabs are registered trademarks of Cable

Television Laboratories, Inc. (CableLabs®).

M AX 2065E TL+ T -40°C to +85°C 40 Thin QFN-EP*

MAX2065ETL+

Attenuator States

Last)

Undershoot

PART

MAX2066 (Digital VGA)

MAX2067 (Analog VGA)

Quickly Access Any One of Four Customized

Ideal for Fast-Attack, High-Level Blocker Protection

Prevents ADC Overdrive Condition

+42dBm OIP3

+63dBm OIP2

+19dBm Output 1dB Compression Point

-67dBc HD2

-83dBc HD3

for Operating Device in Reduced-Power/

Reduced-Performance Mode

Attenuation States Without Reprogramming

the SPI Bus

-40°C to +85°C 40 Thin QFN-EP*

TEMP RANGE

Ordering Information

PIN-

PACKAGE

Features

T4066-3

CODE

PKG

Related parts for MAX2065

MAX2065 Summary of contents

Page 1

... NF at maximum gain (includes attenuator insertion losses), and a high OIP3 level of +42dBm. Each of these features makes the MAX2065 an ideal VGA for numerous receiver and transmitter applications. In addition, the MAX2065 operates from a single +5V supply with full performance single +3 ...

Page 2

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA ABSOLUTE MAXIMUM RATINGS VCC_ to GND ........................................................-0.3V to +5.5V VDD_LOGIC, DATA, CS, CLK, SER/PAR, VDAC_EN, VREF_SELECT.....................................-0.3V to (VCC_ + 0.3V) STATE_A, STATE_B, D0–D4 ....................-0.3V to (VCC_ + 0.3V) AMP_IN, AMP_OUT, VREF_IN, ANALOG_VCTRL ...

Page 3

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA +3.3V SUPPLY AC ELECTRICAL CHARACTERISTICS ( Typical Application Circuit , V = +3.0V to +3.6V tors set for maximum gain -20dBm PARAMETER SYMBOL RF Frequency Range ...

Page 4

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA +5V SUPPLY AC ELECTRICAL CHARACTERISTICS (continued) ( Typical Application Circuit , V = +4.75 to +5.25V, HC mode with each attenuator set for maximum gain, 50MHz ≤ -40°C ...

Page 5

Page 6

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +5.0V, HC mode, both attenuators set for maximum gain ence used, unless otherwise noted.) SUPPLY CURRENT vs 150 T = -40°C C 140 T = +25°C ...

Page 7

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +5.0V, HC mode, both attenuators set for maximum gain ence used, unless otherwise noted.) S21 PHASE CHANGE OVER DIGITAL ATTENUATOR SETTING vs. RF FREQUENCY ...

Page 8

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +5.0V, HC mode, both attenuators set for maximum gain ence used, unless otherwise noted.) NOISE FIGURE vs. RF FREQUENCY +85° ...

Page 9

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +5.0V, HC mode, both attenuators set for maximum gain ence used, unless otherwise noted.) 2nd HARMONIC vs. RF FREQUENCY 3dBm OUT V = 5.25V CC ...

Page 10

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +5.0V, HC mode, both attenuators set for maximum gain ence used, unless otherwise noted.) OIP2 vs. DIGITAL ATTENUATOR STATE -40° +25°C ...

Page 11

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +5.0V, attenuator only, maximum gain GAIN vs. RF FREQUENCY (DIGITAL ATTENUATOR ONLY -40° +85° 250 ...

Page 12

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +5.0V, LC mode, both attenuators set for maximum gain used, unless otherwise noted.) SUPPLY CURRENT vs (LOW CURRENT MODE -40° ...

Page 13

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +5.0V, LC mode, both attenuators set for maximum gain used, unless otherwise noted.) OUTPUT P1dB vs. RF FREQUENCY (LOW CURRENT MODE -40° ...

Page 14

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +5.0V, LC mode, both attenuators set for maximum gain used, unless otherwise noted.) 2nd HARMONIC vs. ANALOG ATTENUATOR STATE (LOW CURRENT MODE 0dBm OUT RF ...

Page 15

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +3.3V, HC mode, both attenuators set for maximum gain ence used, unless otherwise noted.) SUPPLY CURRENT vs -40° ...

Page 16

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +3.3V, HC mode, both attenuators set for maximum gain ence used, unless otherwise noted.) OUTPUT P1dB vs. RF FREQUENCY 3. -40°C ...

Page 17

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (V = +3.3V, HC mode, both attenuators set for maximum gain ence used, unless otherwise noted.) 2nd HARMONIC vs. ANALOG ATTENUATOR STATE 0dBm OUT RF = 200MHz ...

Page 18

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA PIN NAME 1, 16, 19, 22, 24–28, 30, GND Ground 31, 33–36 DAC Reference Voltage Selection Logic Input. Logic 1 = internal DAC reference voltage, 2 VREF_SELECT Log ...

Page 19

... X = Don’t care. MICROWIRE is a trademark of National Semiconductor Corp. ______________________________________________________________________________________ In addition, the MAX2065 operates from a single +5V supply single +3.3V supply with slightly reduced performance, and has adjustable bias to trade current consumption for linearity performance. The MAX2065 integrates one analog attenuator and one 5-bit digital attenuator to achieve a high level of dynamic range ...

Page 20

... High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA MSB DATA DN CLOCK CS t EWS Figure 1. MAX2065 SPI Timing Diagram Table 2. SPI Data Format FUNCTION BIT D27 (MSB) D26 Digital Attenuator State 4 D25 D24 D23 D22 D21 Digital Attenuator State 3 D20 D19 D18 D17 ...

Page 21

... The MAX2065 has an added feature that provides “rapid fire” gain selection between four prepro- grammed attenuation steps. As with the supplemental 5-bit bus mentioned above, this “ ...

Page 22

... ADC overdrive condition. In this example, the MAX2065 would be preprogrammed (through the SPI bus) with two customized attenuation states—one to address the static gain trim adjustment, the second to counter the unwanted blocker condition ...

Page 23

... The MAX2065 features an optional +3.3V supply voltage operation with slightly reduced linearity performance. Layout Considerations The pin configuration of the MAX2065 has been opti- mized to facilitate a very compact physical layout of the device and its associated discrete components. The exposed paddle (EP) of the MAX2065’s 40-pin thin QFN-EP package provides a low thermal-resistance path to the die ...

Page 24

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA C11 R4 VREF_IN C13 + GND VREF_SELECT VDAC_EN DATA CLK VDD_LOGIC C1 SER/PAR STATE_A STATE_B 10 24 ______________________________________________________________________________________ V CC C12 RF INPUT C10 ...

Page 25

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA TOP VIEW + GND 1 VREF_SELECT 2 VDAC_EN 3 DATA 4 CLK VDD_LOGIC 7 SER/PAR 8 STATE_A 9 STATE_B 10 Chip Information PROCESS: SiGe BiCMOS ______________________________________________________________________________________ Pin Configuration/Functional Block ...

Page 26

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 26 ______________________________________________________________________________________ Package Information ...

Page 27

High-Linearity, Serial/ Parallel-Controlled Analog/Digital VGA (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry ...

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