AD8117_07 AD [Analog Devices], AD8117_07 Datasheet

AD8117_07

Manufacturer Part Number

AD8117_07

Description

Manufacturer

AD [Analog Devices]

Datasheet

1.AD8117_07.pdf (36 pages)

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FEATURES

High channel count, 32 × 32 high speed, non-blocking

Differential or single-ended operation

Differential G = +1 (AD8117) or G = +2 (AD8118)

Flexible power supplies

Serial or parallel programming of switch array

High impedance output disable allows connection of

Excellent video performance

Excellent ac performance

Low power of 2.5 W

Low all hostile crosstalk

Reset pin allows disabling of all outputs (connected through

304-ball BGA package (31 mm × 31 mm)

APPLICATIONS

Routing of high speed signals including

GENERAL DESCRIPTION

The AD8117/AD8118 are high speed, 32 × 32 analog crosspoint

switch matrices. They offer 600 MHz bandwidth and slew rate of

1800 V/μs for high resolution computer graphics (RGB) signal

switching. With less than −70 dB of crosstalk and −90 dB

isolation (@ 5 MHz), the AD8117/AD8118 are useful in many

high speed applications. The 0.1 dB flatness greater than

50 MHz makes the AD8117/AD8118 ideal for composite video

switching.

The AD8117/AD8118 include 32 independent output buffers

that can be placed into a high impedance state for paralleling

crosspoint outputs so that off-channels present minimal loading

to an output bus. The AD8117 has a differential gain of +1,

while the AD8118 has a differential gain of +2 for ease of use in

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

switch array

Single +5 V supply, or dual ±2.5 V supplies

multiple devices with minimal loading on output bus

>50 MHz 0.1 dB gain flatness

0.05%/0.05° differential gain/phase error (R

Bandwidth: 600 MHz

Slew rate: 1800 V/μs

Settling time: 2.5 ns to 1%

< −70 dB @ 5 MHz

< −43 dB @ 600 MHz

a capacitor to ground provides power-on reset capability)

RGB and component video routing

KVM

Compressed video (MPEG, wavelet)

Data communications

= 150 Ω)

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

back-terminated load applications. They operate as fully

differential devices or can be configured for single-ended

operation. Either a single +5 V supply or dual ±2.5 V supplies

can be used, while consuming only 500 mA of idle current with

all outputs enabled. The channel switching is performed via a

double-buffered, serial digital control (which can accommodate

daisy chaining of several devices), or via a parallel control,

allowing updating of an individual output without reprogram-

ming the entire array.

The AD8117/AD8118 are packaged in a 304-ball BGA package

and are available over the extended industrial temperature

range of −40°C to +85°C.

SER/PAR

UPDATE

DATA IN

RESET

CLK

600 MHz, 32 × 32 Buffered

*AD8117 ONLY

**AD8118 ONLY

AD8117/

AD8118

Analog Crosspoint Switch

FUNCTIONAL BLOCK DIAGRAM

RECEIVER

G = +2**

G = +1*

INPUT

D0 D1 D2 D3 D4 D5

192-BIT SHIFT REGISTER

32 × 6:32 DECODERS

PARALLEL LOADING

PARALLEL LATCH

VPOS

WITH 6-BIT

DECODE

SWITCH

MATRIX

Figure 1.

VNEG

AD8117/AD8118

192

1024

VDD

OUTPUT

BUFFER

G = +1

VOCM

DGND

www.analog.com

DATA

OUT

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