ATA6625-TAPY ATMEL [ATMEL Corporation], ATA6625-TAPY Datasheet - Page 6

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ATA6625-TAPY

Manufacturer Part Number
ATA6625-TAPY
Description
LIN Bus Transceiver with Integrated Voltage Regulator
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
4.1
4.2
6
Normal Mode
Silent Mode
ATA6623/ATA6625
Table 4-1.
This is the normal transmitting and Receiving Mode of the LIN Interface, in accordance with LIN
specification 2.0. The V
tolerance of ±2% and a maximum output current of 50 mA.
If an undervoltage condition occurs, NRES is switched to low and the IC changes its state to
Fail-safe Mode. All features are available.
A falling edge at EN while TXD is high switches the IC into Silent Mode. The TXD Signal has to
be logic high during the Mode Select window
disabled in Silent Mode. The overall supply current from V
I
The 3.3V/5V regulator with 2% tolerance can source up to 50 mA. In Silent Mode the internal
slave termination between pin LIN and pin VS is disabled to minimize the power dissipation in
case pin LIN is short-circuited to GND. Only a weak pull-up current (typically 10 µA) between pin
LIN and pin VS is present. The Silent Mode can be activated independently from the current
level on pin LIN.
If an undervoltage condition occurs, NRES is switched to low and the ATA6623/ATA6625
changes its state to Fail-safe Mode.
A voltage less than the LIN Pre-wake detection V
receiver.
A falling edge at the LIN pin followed by a dominant bus level maintained for a certain time
period (t
remote wake-up request. The device switches from Silent Mode to Fail-safe Mode, then the
internal LIN slave termination resistor is switched on. The remote wake-up request is indicated
by a low level at pin RXD to interrupt the microcontroller
used to switch directly to Normal Mode.
VSsi
= 57 µA plus the V
Operation
Mode of
Fail safe
Normal
Silent
Sleep
bus
) and the following rising edge at pin LIN (see
Mode of Operation
CC
CC
regulator output current I
Transceiver
voltage regulator operates with a 3.3V/5V output voltage, with a low
OFF
OFF
OFF
ON
(Figure 4-2 on page
3.3V/5V
3.3V/5V
3.3V/5V
VCCs
V
0V
CC
LINL
.
(Figure 4-3 on page
at pin LIN activates the internal LIN
Figure 4-3 on page
RXD
High
High
High
Batt
0V
7). The transmission path is
is a combination of the
7). EN high can be
TXD depending
Recessive
Recessive
Recessive
4957F–AUTO–02/08
7) results in a
LIN

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