ATA6827_07 ATMEL [ATMEL Corporation], ATA6827_07 Datasheet - Page 4

• Manufacturer Part Number: ATA6827_07
• Description: High Temperature Triple Half-bridge Driver with Serial Input Control
• Manufacturer: ATMEL [ATMEL Corporation]

3. Functional Description
3.1
Figure 3-1.
4
Serial Interface
CLK
ATA6827
DO
CS
DI
Data Transfer
0
SRR
TP
1
LS1
S1L
Data transfer starts with the falling edge of the CS signal. Data must appear at DI synchronized
to CLK and are accepted on the falling edge of the CLK signal. LSB (bit 0, SRR) has to be trans-
ferred first. Execution of new input data is enabled on the rising edge of the CS signal. When CS
is high, pin DO is in tri-state condition. This output is enabled on the falling edge of CS. Output
data will change their state with the rising edge of CLK and stay stable until the next rising edge
of CLK appears. LSB (bit 0, TP) is transferred first.
Table 3-1.
Bit
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
2
HS1
S1H
3
LS2
S2L
Input Register
Input Data Protocol
4
S2H
HS2
OCS
SRR
HS1
HS2
HS3
n. u.
n. u.
n. u.
n. u.
n. u.
n. u.
n. u.
n. u.
LS1
LS2
LS3
5
LS3
S3L
6
HS3
S3H
Function
Status register reset (high = reset; the bits PSF, OPL and SCD in the
output data register are set to low)
Controls output LS1 (high = switch output LS1 on)
Controls output HS1 (high = switch output HS1 on)
See LS1
See HS1
See LS1
See HS1
Not used
Not used
Not used
Not used
Not used
Not used
Overcurrent shutdown (high = overcurrent shutdown is active)
Not used
Not used
7
n. u.
n. u.
8
n. u.
n. u.
9
n. u.
n. u.
10
n. u.
n. u.
11
n. u.
n. u.
12
n. u.
n. u.
13
OCS
SCD
14
OPL
n. u.
15
PSF
n. u.
4912D–AUTO–06/07