SAA6752HS/V103 PHILIPS [NXP Semiconductors], SAA6752HS/V103 Datasheet - Page 22

• Manufacturer Part Number: SAA6752HS/V103
• Description: MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
7.3.10
The video compression block, shown in Fig.4, contains the
following sub-modules:
2004 Jan 26
handbook, full pagewidth
MacroBlock Processor (MBP). Reads uncompressed
video data from SDRAM and generates the compressed
bitstream on MB level (without MB headers). Addresses
for frame buffer (previous frame) access are generated
by the MBP.
Core control. Performs MB and slice header
generation, base address generation for the current MB
(uncompressed), motion vector candidate generation,
and computation of encoding statistics required by the
CPU for bit rate controlling.
MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer
C
OMPRESSION BLOCK PARTITIONING
from video
front-end
to/from SDRAM-IF
MBP/CPM
Fig.4 Video compressor block diagram.
GENERIC INTERFACE
CORE CONTROL
to/from PCI-bus
22
VIDEO COMPRESSION BLOCK
PACKER
PRE-
Pre-packer (part of packing unit). Since the MBP output
words are not necessarily fully used (i.e. some output
words may contain unused bits) the pre-packer packs
the output of the MBP in such a way that all words
contain valid bits. This reduces the amount of memory
required for storing the MB data.
Packer (part of packing unit). Merges header and MB
headers.
PACKING UNIT
MEMORY
to SDRAM-IF
PACKER
MHC131
SAA6752HS
Product specification