STV5342 STMICROELECTRONICS [STMicroelectronics], STV5342 Datasheet - Page 13

• Manufacturer Part Number: STV5342
• Description: TELETEXT DECODER WITH 4 INTERGATED PAGES
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

8/30 READING
8/30 packet is read at row 23 equivalent address.
R8 register must be programmed with D3, D2,
D0 = 0 and D2 = 1 (8/30 selection).
Table 1 : Row 25 received page control data format
REGISTER MAP (see Table 2)
Registers R0 to R10 are write only whilst R11A is a
read/write and R11B is a read only register respect
to the microprocessor.
The automatic succession on a byte basis is indi-
cated by the arrows in Table 2.
In the normal operating mode TA, TB and TC
should be set to logic level 0.
After power-up the contents of the registers are as
Table 2 : Register specification
* Reserved register bits : must be set to 0
D7
*
TA
*
*
*
BKGND
OUT
BKGND
OUT
STATUS
ROW
BTM/TOP
*
*
*
D7
(R/W)
60Hz
COLUMN
Page number : - MAG = magazine, PU = page units, PT = page tens.
Page sub-code : - MU = minutes units, MT = minutes tens, HU = hours units, HT = hours tens.
PBLF = page being looked for, FOUND = low for page found, HAM = hamming error in byte, C4-14 = control bits.
D0
D1
D2
D3
D4
D5
D6
D7
D6
*
7 + P/
8 BIT
*
*
*
BKGND
IN
BKGND
IN
CURSOR
ON
*
*
*
D6
(R/W)
0
HAM
PU0
PU1
PU2
PU3
0
0
0
0
D5
*
ACQ.
ON/OFF
ACQ
CCT
A1
*
*
COR
OUT
COR
OUT
CONCEAL/
REVEAL
*
*
C5
D5
(R/W)
0
HAM
PT0
PT1
PT2
PT3
0
0
0
1
D4
*
8/30
ENABLE
ACQ.
CCT
A0
PRD4
*
COR
IN
COR
IN
TOP/
BOTTOM
*
R4
C4
D4
(R/W)
0
HAM
MU0
MU1
MU2
MU3
0
0
0
2
D3
*
DEW/
FULL
FIELD
TB
PRD3
*
TEXT
OUT
TEXT
OUT
SINGLE/
DOUBLE
HEIGHT
CLEAR
MEM.
R3
C3
D3
(R/W)
0
HAM
D2
EVEN
OFF
TCS
ON
START
COLUMN
SC2
PRD2
*
TEXT
IN
TEXT
IN
BOX ON
24
8/30
SELECT
R2
C2
D2
(R/W)
0
MT0
MT1
MT2
C4
0
0
0
3
D1
TC
T1
START
COLUMN
SC1
PRD1
A1
PON
OUT
PON
OUT
BOX ON
1-23
A1
R1
C1
D1
(R/W)
0
HAM
HU0
HU1
HU2
HU3
0
0
0
4
R9 register must be programmed with 23 (17h).
R10 register value corresponds to the position of
the byte to be read (from 0 to 39).
R11A contents the value of the needed byte.
follows : all bits in registers R0 to R11A are cleared
to zero with the exception of bits D0 and D1 in
registers R5 and R6 which are set to logical one.
After power-up all the memory bytes are preset to
hexadecimalvalue 20 H (space) with the exception
of the byte corresponding to row 0 of column 7 of
chapter 0 which is set to the value corresponding
to ”alpha white” hexadecimal value 07 H.
D0
SEL11B
T0
START
COLUMN
SC0
PRD0
A0
PON
IN
PON
IN
BOX ON
0
A0
R0
C0
D0
(R/W)
VCS
signal
quality
HAM
HT0
HT1
C5
C6
0
0
0
5
HAM
C10
C7
C8
C9
0
0
0
6
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11A
R11B
Mode 0
Mode 1
Page request adress
Page request data
Display chapter
Display control (normal)
Display control
(newsflash / subtitle)
Display mode
Active chapter
Active row
Active column
Active data
Status
HAM
C12
C13
C14
C11
0
0
0
7
FOUND
MAG0
MAG1
MAG2
0
0
0
0
8
STV5342
PBLF
0
0
0
0
0
0
0
9
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