Z0221524AECR50A5T ZILOG [Zilog, Inc.], Z0221524AECR50A5T Datasheet - Page 48

• Manufacturer Part Number: Z0221524AECR50A5T
• Description: Single Chip Modem with Integrated Controller, Data Pump, and Analog Front End
• Manufacturer: ZILOG [Zilog, Inc.]

PS001907-0904
Register Range
S91
0–255
Table 7. Modem S-Registers (Continued)
Default
0x88
Single Chip Modem with Integrated Controller, Data Pump, and AFE
Units
Description
PttBitmap (11)
Bit 0: FORCE_1800HZ_GT, set to force use of 1800 HZ
guard tone.
Bit 1: CALLTONE_ENABLED, set to force use of V.25 calling
tone.
Bit 2: DO_SWISS_BUSY, set to use the Swiss busy
workaround.
Bit 3: PTT_TEST_CMD, set to enable the AT&HT command
(PTT test).
Bit 4: BLIST_ENABLED, set to enable blacklisting. See
BL_MINDELAY_S and related parameters.
Bit 5: FRANCE_CALL_DELAY, set to force France call
originate delay after ring.
Bit 6: VOICE_ANSWER, set to enable detection of voice
answer.
Bit 7: DTMF_S11, set to use S11 instead of
DTMFINTERDIGITMS for the delay between dialed DTMF
digits.
Modem S-Registers
Z02215
42