ADUC814_02 AD [Analog Devices], ADUC814_02 Datasheet
ADUC814_02
Related parts for ADUC814_02
ADUC814_02 Summary of contents
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FEATURES Analog I/O 6-Channel 247 kSPS ADC 12-Bit Resolution ADC High Speed Data Capture Mode Programmable Reference via On-Chip DAC for Low Level Inputs ADC Performance Down to V Dual-Voltage Output DACs 12-Bit Resolution Settling Time Memory ...
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ADuC814–SPECIFICATIONS XTAL1/XTAL2 = 32.768 kHz Crystal. All specifications T Parameter ADC CHANNEL SPECIFICATIONS A GRADE ACCURACY Resolution Integral Nonlinearity Differential Nonlinearity Integral Nonlinearity Differential Nonlinearity CALIBRATED ENDPOINT ERRORS Offset Error Offset Error Match Gain Error Gain Error ...
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Parameter DAC CHANNEL SPECIFICATIONS 9 DC ACCURACY Resolution Relative Accuracy 10 Differential Nonlinearity Offset Error Gain Error Gain Error Mismatch ANALOG OUTPUTS Voltage Range_0 Voltage Range_1 Output Impedance I SINK DAC AC SPECIFICATIONS Voltage Output Settling Time Digital-to-Analog Glitch Energy ...
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ADuC814 SPECIFICATIONS (continued) Parameter 13 SCLOCK and RESET Only (Schmitt-Triggered Inputs T– V – T– INPUT CURRENTS P1.2–P1.7, DLOAD 14 SCLOCK RESET P1.0, P1.1, Port 3 (includes MISO, MOSI/SDATA, and SS) INPUT CAPACITANCE CRYSTAL OSCILLATOR ...
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Parameter START-UP TIME (continued) 15 Oscillator Powered Down 2 Wake-Up with SPI/I C Interrupt Wake-Up with TIC Interrupt Wake-Up with External RESET After External RESET in Normal Mode After WDT Reset in Normal Mode FLASH/EE MEMORY RELIABILITY 16 CHARACTERISTICS 17 ...
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ADuC814 SPECIFICATIONS (continued) NOTES 1 Temperature range –40ºC to +125ºC. 2 ADC linearity is guaranteed when operating in nonpipelined mode, i.e., ADC conversion followed sequentially by a read of the ADC result. ADC linearity is also guaranteed during normal MicroConverter ...
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TIMING SPECIFICATIONS Parameter CLOCK INPUT (External Clock Driven XTAL1) t XTAL1 Period CK t XTAL1 Width Low CKL t XTAL1 Width High CKH t XTAL1 Rise Time CKR t XTAL1 Fall Time CKF 1/t ADuC814 Core Clock ...
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ADuC814 TIMING SPECIFICATIONS (continued) Parameter UART TIMING (Shift Register Mode) t Serial Port Clock Cycle Time XLXL t Output Data Setup to Clock QVXH t Input Data Setup to Clock DVXH t Input Data Hold after Clock XHDX t Output ...
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Parameter SPI MASTER MODE TIMING (CPHA = 1) t SCLOCK Low Pulsewidth SL t SCLOCK High Pulsewidth SH t Data Output Valid after SCLOCK Edge DAV t Data Input Setup Time before SCLOCK Edge DSU t Data Input Hold Time ...
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ADuC814 TIMING SPECIFICATIONS (continued) Parameter SPI MASTER MODE TIMING (CPHA = 0) t SCLOCK Low Pulsewidth SL t SCLOCK High Pulsewidth SH t Data Output Valid after SCLOCK Edge DAV t Data Output Setup before SCLOCK Edge DOSU t Data ...
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Parameter SPI SLAVE MODE TIMING (CPHA = SCLOCK Edge SCLOCK Low Pulsewidth SL t SCLOCK High Pulsewidth SH t Data Output Valid after SCLOCK Edge DAV t Data Input Setup Time before SCLOCK Edge ...
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ADuC814 Parameter SPI SLAVE MODE TIMING (CPHA = SCLOCK Edge SCLOCK Low Pulsewidth SL t SCLOCK High Pulsewidth SH t Data Output Valid after SCLOCK Edge DAV t Data Input Setup Time before SCLOCK ...
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ABSOLUTE MAXIMUM RATINGS (T = 25°C, unless otherwise noted AGND . . . . . . . . . . . . . . . . . . . . . . . –0 ...
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ADuC814 Pin No. Mnemonic Type* 1 DGND S 2 DLOAD I 3-7 P3.0–P3.4 I/O 3 P3.0/RXD I/O 4 P3.1/TXD I/O 5 P3.2/INT0 I/O 6 P3.3/INT1 I/O 7 P3.4/T0/CONVST I/O 8-9 P1.0–P1.1 I/O 8 P1.0/T2 I/O 9 P1.1/T2EX I/O 10 RESET ...
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Pin No. Mnemonic Type* 16 VREF I/O 17 CREF I 18-21 P1.4–P1 P1.4/ADC2 I 19 P1.5/ADC3 I 20 P1.6/ADC4/DAC0 I/O 21 P1.7/ADC5/DAC1 I/O 22-24 P3.5–P3.7 I/O 22 P3.5/T1 I/O 22 P3.5/SS/EXTCLK I/O 23 P3.6/MISO I/O 24 P3.7/MOSI I/O ...
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ADuC814 PIN 1 0.15 (0.006) 0.05 (0.002) SEATING PLANE CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN OUTLINE DIMENSIONS 28-Lead TSSOP Package (RU-28) Dimensions ...