PX1011A-ELG NXP [NXP Semiconductors], PX1011A-ELG Datasheet - Page 27
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PX1011A-ELG
Manufacturer Part Number
PX1011A-ELG
Description
PCI Express stand-alone X1 PHY
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PX1011A-ELG.pdf
(32 pages)
Philips Semiconductors
14. Abbreviations
15. References
PX1011A_PX1012A_2
Product data sheet
[3]
[4]
[5]
[6]
[7]
[8]
[9]
Table 23.
[1]
[2]
Acronym
BER
BIST
CMOS
EMI
ESD
FPGA
LTSSM
MAC
P2S
PCI
PCS
PHY
PLL
PIPE
PVT
S2P
SerDes
SKP
SSTL_2
These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no
account be processed through more than one soldering cycle or subjected to infrared reflow soldering with
peak temperature exceeding 217 C
body peak temperature must be kept as low as possible.
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the
solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink
on the top side, the solder might be deposited on the heatsink surface.
If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave
direction. The package footprint must incorporate solder thieves downstream and at the side corners.
Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger
than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered
pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by
using a hot bar soldering process. The appropriate soldering profile can be provided on request.
Hot bar soldering or manual soldering is suitable for PMFP packages.
PCI Express Base Specification — Rev. 1.0a - PCISIG
PHY Interface for the PCI Express Architecture (PIPE) Specification Version
1.00 — Intel Corporation
Abbreviations
Description
Bit Error Rate
Built-In Self Test
Complementary Metal Oxide Semiconductor
ElectroMagnetic Interference
ElectroStatic Discharge
Field Programmable Gate Array
Link Training and Status State Machine
Media Access Control
Parallel to Serial
Peripheral Component Interconnect
Physical Coding Sub-layer
PHYsical layer
Phase-Locked Loop
PHY Interface for the PCI Express
Process Voltage Temperature
Serial to Parallel
Serializer and De-serializer
SKiP
Stub Series Terminated Logic for 2.5 Volts
Rev. 02 — 18 May 2006
10 C measured in the atmosphere of the reflow oven. The package
PX1011A/PX1012A
PCI Express stand-alone X1 PHY
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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