ZPSD211R-B-15J STMICROELECTRONICS [STMicroelectronics], ZPSD211R-B-15J Datasheet
ZPSD211R-B-15J
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ZPSD211R-B-15J Summary of contents
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... Low Cost Field Programmable Microcontroller Peripherals FEATURES SUMMARY Single Supply Voltage: – 5 V±10% for PSD211R and ZPSD211R – 2.7 to 5.5 V for ZPSD211RV Up to 256 Kbit of EPROM Input Latches Programmable I/O ports Programmable Security January 2002 ZPSD211R, ZPSD211RV Figure 1. Packages PLDCC44 (J) CLDCC44 (L) PQFP44 (M) ...
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... Recommended Operating Conditions......................................................................................................30 18.4 Pin Capacitance.......................................................................................................................................30 18.5 AC/DC Characteristics – PSD211R/ZPSD211R (All 5 V devices)...........................................................31 18.6 AC/DC Characteristics – PSD211RV (3 V devices only).........................................................................32 18.7 Timing Parameters – PSD211R/ZPSD211R (All 5 V devices) ................................................................33 18.8 Timing Parameters – ZPSD211RV (3 V devices only) ............................................................................34 18.9 Timing Diagrams for PSD211R Parts .....................................................................................................36 18.10 AC Testing ...............................................................................................................................................39 i PSD211R Family ...
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... PSD211R Low Cost Microcontroller Peripherals 19 Pin Assignments .................................................................................................................................................40 20 Package Information ...........................................................................................................................................41 21 Package Drawings ..............................................................................................................................................42 22 PSD211R Ordering Information ..........................................................................................................................45 22.1 Selector Guide .........................................................................................................................................45 22.2 Part Number Construction .......................................................................................................................46 22.3 Ordering Information................................................................................................................................46 23 Data Sheet Revision History ...............................................................................................................................47 Sales Reps .........................................................................................................................................................48 PSD211R Family ZPSD211R ZPSD211RV Table of Contents (cont.) ii ...
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The low cost PSD211R family integrates high-performance and user-configurable blocks of EPROM and programmable logic into one part. The PSD211R products also provide a Introduction powerful microcontroller interface that eliminates the need for external “glue logic”. The part’s integration, ...
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... Throughout this data sheet, references are made to the PSD211R. In most cases, these Notation references also cover the ZPSD211R and ZPSD211RV products. Exceptions will be noted. Also, references to the ZPSD211R will also cover the low-voltage ZPSD211RV. (Again, exceptions will be noted.) Use the following table to determine what references cover which product versions: ...
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Figure 1. PSD211R Family Architecture A8–A15 AD0–AD7 ALE/AS RD/E WR/R/W PSEN RESET A19/CSI A11–A15 L A8–A10 A19/CSI A19/CSI ALE/AS ALE/AS PAD RESET 13 P.T. RESET ALE/AS ES7 ES6 ES5 L ES4 ...
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PSD211R Family 3.0 Low cost programmable microcontroller peripheral Key Features 256Kb of UV EPROM with the following features: • Configurable • Divided into eight equally-sized mappable blocks for optimized address mapping • As fast as ...
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... PSD211R Family Feature Table 1. PSD211R Product Summary Summary Part PSD211R ZPSD211R ZPSD211RV NOTE: The low power version of the ZPSD211R (the ZPSD211RV) can only accept an active-low level Reset input. 5.0 Motorola family: 68HC11, 68HC05C0 Partial Listing Intel family: of Microcontrollers Philips family: ...
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PSD211R Family 7.0 7.1 Integrated Power Management ZPSD Upon each address or logic input change to the ZPSD, the device powers up from low Background power standby for a short time. Then the ZPSD consumes only the necessary power to ...
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... ALE/AS transparent logic input. PSD211R/ZPSD211R: This pin is user-programmable and can be configured to reset on a high- or low-level input. Reset must be applied for at least 100 ns. ZPSD211RV: I This pin is not configurable, and the chip will only reset on an active-low level input. Reset must be applied for at least 500 ns, and no operations may take place for an additional 500 ns minimum ...
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PSD211R Family Table 1. Name PSD211R Pin Descriptions (cont.) PC0 PC1 PC2 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 A8 A9 A10 A11 A12 A13 A14 A15 GND V CC Legend: 8 Type These pins make up Port C. ...
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The PSD211R operates in 8-bit address/data mode, enabling it to interface directly to a variety of 8-bit multiplexed microcontrollers. It works as follows: the address/data bus Operating Mode (AD0-AD7) is bi-directional and permits the latching of the address when ...
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PSD211R Family Programmable Figure 4. PAD Description Address Decoder (PAD) ALE R/W A19 A18 A17 A16 A15 A14 A13 A12 A11 CSI RESET NOTES: 1. CSI is a power-down signal. When high, the PAD is ...
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Programmable Table 4. PSD211R PAD A and PAD B Functions Address Decoder (PAD) PAD A and PAD B Inputs (cont.) A19/CSI A16–A18 A11–A15 RD R/W ALE/AS RESET PAD A Outputs ES0–ES7 CSIOPORT PAD B Outputs CS0–CS3 CS4 –CS7 ...
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PSD211R Family 10.0 The PSD211R has three I/O ports (Ports A, B, and C) that are configurable at the bit level. I/O Port This permits great flexibility and a high degree of customization for specific applications. The next section describes ...
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Port A (PA0-PA7) I/O Port Latched Address Output Mode Functions Alternatively, any bit(s) of Port A can be configured to output a low-order demultiplexed (Cont.) address bus bit. The address is provided by the internal PSD address latch, ...
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PSD211R Family 10.0 10.3 Port B (PB0-PB7) I/O Port MCU I/O Mode Functions The default configuration of Port B is MCU I/O. In this mode, every pin can be set (Cont.) (at run-time input or output by writing ...
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Port C (PC0-PC2) I/O Port Each pin of Port C (Figure 7) can be configured as an input to PAD A and PAD Functions output from PAD B. As inputs, the pins are referenced ...
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PSD211R Family 11.0 The following sections explain the EPROM memory block and how to program and erase the PSD211R. PSD Memory 11.1 EPROM For all PSD211R devices, the EPROM is built using Zero-power technology. This means that the EPROM powers ...
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ALE or AS Control Signals Connect the ALE or AS signal from your MCU to this pin where applicable, and program the polarity using PSDsoft. The trailing edge (when the signal goes inactive) of ALE or AS (Cont.) ...
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... For low-voltage ZPSD211RV devices only, the reset input must be asserted for at least 500 nsec. The ZPSD211RV will not be functional for an additional 500 nsec after reset is de-asserted (see Figure 8). These low voltage ZPSD211RV devices require an active-low polarity signal for reset ...
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... Port Pins PB0-PB7 Port Pins PC0-PC2 NOTE: 1. Signal is valid immediately after reset for non-V devices. ZPSD211RV devices need an additional 500 nsec after reset before signal is valid. Table 8B. Internal PSD Signal States During and Just After Reset PAD A and PAD B All registers in CSIOPORT ...
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PSD211R Family 13.0 This section only applies to users who have an 8031 or compatible MCU that outputs a signal such as PSEN when accessing program space. If this applies to you, be aware of the Program/Data following: the PSD211R ...
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In Figure 11, the PSD211R is configured to interface with Intel’s 80C31, which is a 16-bit address/8-bit data bus microcontroller. Its data bus is multiplexed with the low-order System address byte. The 80C31 uses signals RD to read from ...
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PSD211R Family 14.0 In Figure 12, the PSD211R is configured to interface with Motorola’s 68HC11, which is a 16-bit address/8-bit data bus microcontroller. Its data bus is multiplexed with the System low-order address byte. The 68HC11 uses E and R/W ...
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Security Mode in the PSD211R locks the contents of PAD A, PAD B, and all the configuration bits. The EPROM and I/O contents can be accessed only through the PAD. Security Mode The Security Mode must be set by ...
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PSD211R Family 16. 16.3 Turbo Bit (ZPSD only) Power The turbo bit is controlled by the MCU at run-time and is accessed through bit zero of the Management Power Management Register (PMR). The PMR is located in CSIOPORT space at ...
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... Then you will have a number that represents your best estimate at the worst case scenario. Since this is a complicated process, the following example should help. Example Composite Frequency Calculation Suppose you had the following circuit: 80C31 (12 MHz Crystal) ZPSD211R AD0-AD7 A8-A16 PA ALE ...
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... These first four transitions all count toward the final composite frequency. • The transition at (1) in the diagram does not count as a distinct transition because it is within 25 nsec of a neighboring transition (use 50 nsec for a ZPSD211RV device). • Transition (2) above does not add to the composite frequency because only the internally latched address signals reach the PADs, the data signal transitions do not. • ...
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... ZPSD devices operating in non-turbo mode into Standby while no inputs are changing on any pin, and Turbo Mode is disabled. PSD211R Family = ZPSD211R ( 2.0 MHz = 8.0 MHz (see example in above section) ...
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PSD211R Family 17.0 Figure 13. Typical I Calculating Power (cont.) Figure 14. Typical I 28 vs. Frequency for the PAD ( Turbo Non -Turbo 10 PT Turbo Non -Turbo 30 ...
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... ± 10 ZPSD211R( 0.00 0.10 0.20 0.30 0. (V) Figure 17. Normalized I (AC) CC ZPSD211R(V) 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 2.5 3.0 3.5 4.0 2 Figure 16. Normalized I 3.5 3.0 2.5 2.0 1.5 1.0 Temp. = 125°C Temp. = 25°C 0.5 0.50 0.60 0.70 0.80 Figure 18. Normalized Access Time (T6 3 1.1 1.05 1.0 0.95 0.9 0.85 0.8 0.75 0.7 0.65 4.5 5.0 5.5 6.0 PSD211R Family (DC vs ZPSD211R(V) 3.0 3.5 4.0 4.5 5.0 5.5 2.5 2 ZPSD211R(V) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 2 3.0 V) 6 6.0 29 ...
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... Absolute Maximum Ratings Specifications Symbol T STG NOTE: 1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the 18.2 Operating Range Range Commercial Industrial NOTE available on ZPSD211RV only. 18.3 Recommended Operating Conditions Symbol 18.4 Pin Capacitance Symbol OUT C VPP NOTES: 1 ...
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... AC/DC Characteristics – PSD211R/ZPSD211R (All 5 V devices) Symbol Parameter V Supply Voltage CC V High-Level Input Voltage IH V Low-Level Input Voltage IL V Output High Voltage OH Output Low Voltage V OL (See Figure 14) ZPSD211R Standby Supply Current I SB (Notes 1,4) PSD211R Standby Supply Current I Input Leakage Current ...
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... PSD211R Family 18.6 AC/DC DC Characteristics ZPSD211RV (3 V devices only) Symbol Parameter V Supply Voltage CC V High-Level Input Voltage IH V Low-Level Input Voltage IL V Output High Voltage OH V Output Low Voltage Standby Supply Current (Notes 1,4) I Input Leakage Current LI I Output Leakage Current LO I (DC) ...
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... Timing Parameters – PSD211R/ZPSD211R (All 5 V devices) Symbol Parameter T1 ALE or AS Pulse Width T2 Address Set-up Time T3 Address Hold Time T4 Leading Edge of Read to Data Active T5 ALE Valid to Data Valid T6 Address Valid to Data Valid T7 CSI Active to Data Valid T8 Leading Edge of Read to Data Valid ...
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... PSD211R Family 18.8 Timing Parameters – ZPSD211RV (3 V devices only) Symbol Parameter T1 ALE or AS Pulse Width T2 Address Set-up Time T3 Address Hold Time T4 Leading Edge of Read to Data Active T5 ALE Valid to Data Valid T6 Address Valid to Data Valid T7 CSI Active to Data Valid T8 Leading Edge of Read to Data Valid ...
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... Timing Parameters – ZPSD211RV (3 V devices only) Symbol Parameter Hold Time of Port A Valid During Write CSOi T29 Trailing Edge 2 T30 CSI Active to CSOi Active 2 T31 CSI Inactive to CSOi 3 T32 Direct PAD Input as Hold Time T33 R/W Active Start T34 End to R/W ...
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PSD211R Family 18.9 Timing Diagrams for all PSD211R Parts Figure 19. Timing using RD and WR signals CSI/A19 as CSI (1) Direct STABLE INPUT PAD Input (2) Multiplexed Inputs A0/AD0- ADDRESS A A7/AD7 2 3 Active High 1 ALE Active ...
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Figure 20. Timing Using R/W and E signals CSI/A19 as CSI 7 (1) Direct STABLE INPUT PAD Input (2) Multiplexed Inputs A0/AD0- ADDRESS A A7/AD7 2 3 Active High 1 AS Active Low WR/V ...
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PSD211R Family Figure 21. Chip-select Output Timing Direct PAD Multiplexed PAD Inputs CSOi Notes for 1. Direct PAD input = any of the following direct PAD input lines: CSI/A19 as transparent A19, RD/ R/W, transparent PC0–PC2, ALE in ...
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Figure 22A. AC Testing Input/Output Waveform (5 V Versions ) 18.10. AC Testing Figure 22B. AC Testing Input/Output Waveform (3 V Versions ) Figure 23A. AC Testing Load Circuit (5 V Versions ) Figure 23B. AC Testing Load Circuit (3 ...
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PSD211R Family 19.0 Pin Assignments Pin Assignments PSEN WR/V RESET PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 GND ALE or AS PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 RD/E AD0/A0 AD1/A1 AD2/A2 AD3/A3 AD4/A4 AD5/A5 AD6/A6 AD7/A7 A8 ...
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Package Information Figure 24. Drawing L4 – 44 Pin Ceramic Leaded Chip Carrier (CLDCC) with Window (Package Type L) OR Drawing J2 – 44 Pin Plastic Leaded Chip Carrier (PLDCC) without Window (Package Type J) (TOP VIEW) Figure 25. ...
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PSD211R Family 21.0 Package Drawings Drawing J2 – 44-Pin Plastic Leaded Chip Carrier (PLDCC) (Package Type J) Family: Plastic Leaded Chip Carrier Symbol Min A 4.19 A1 2.54 A2 3.76 B 0.33 B1 0.66 C 0.246 D 17.40 D1 16.51 ...
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Drawing L4 – 44-Pin Pocketed Ceramic Leaded Chip Carrier (CLDCC) – CERQUAD (Package Type Family: Ceramic Leaded Chip Carrier – CERQUAD Millimeters Symbol Min A 3.94 A1 2.29 A2 3.05 ...
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PSD211R Family Drawing M1 – 44-Pin Plastic Quad Flatpack (PQFP) (Package Type Index 3 Mark B Family: Plastic Quad Flatpack (PQFP) Symbol Min 0° A – A1 1.075 A2 1.95 B 0.30 C ...
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PSD211R Ordering Information PSD211R Family 45 ...
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... PSD211R-B-70M PSD211R-B-90J PSD211R-B-90JI PSD211R-B-15J PSD211R-B-15L PSD211R-B-15M ZPSD211R-B-70J ZPSD211R-B-70L ZPSD211R-B-70M ZPSD211R-B-90JI ZPSD211R-B-90MI ZPSD211R-B-15J ZPSD211R-B-15L ZPSD211R-B-15M ZPSD211RV-B-20J ZPSD211RV-B-20JI ZPSD211RV-B-20L ZPSD211RV-B-20M ZPSD211RV-B-25J ZPSD211RV-B-25JI 46 I 413A2 ...
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... Table 1. Document Revision History Date Rev. Jan-1997 1.0 PSD211R: Document written in the WSI format. Initial release Jul-1997 1.0 ZPSD211R, ZPSD211RV: Document written in the WSI format. Initial release Feb-1998 1.1 Combined Data Sheets. Updated Specifications PSD211R, ZPSD211R, ZPSD211RV: Low Cost Field Programmable Microcontroller Peripherals 31-Jan-2002 1.2 ...
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... STMicroelectronics group of companies Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. The ST logo is registered trademark of STMicroelectronics All other names are the property of their respective owners © 2002 STMicroelectronics - All Rights Reserved www.st.com PSD211R, ZPSD211R, ZPSD211RV 3/3 ...