74AHCT125PW PHILIPS [NXP Semiconductors], 74AHCT125PW Datasheet - Page 2

• Manufacturer Part Number: 74AHCT125PW
• Description: Quad buffer/line driver; 3-state
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
FEATURES
DESCRIPTION
The 74AHC/AHCT125 are
high-speed Si-gate CMOS devices
and are pin compatible with low
power Schottky TTL (LSTTL). They
are specified in compliance with
JEDEC standard No. 7A.
The 74AHC/AHCT125 are four
non-inverting buffer/line drivers with
3-state outputs. The 3-state outputs
(nY) are controlled by the output
enable input (nOE). A HIGH at n
causes the outputs to assume a
HIGH-impedance OFF-state.
The ‘125’ is identical to the ‘126’ but
has active LOW enable inputs.
1999 Sep 27
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
CDM EIA/JESD22-C101
exceeds 1000 V
Balanced propagation delays
All inputs have Schmitt-trigger
actions
Inputs accepts voltages higher than
V
For AHC only:
operates with CMOS input levels
For AHCT only:
operates with TTL input levels
Specified from
Quad buffer/line driver; 3-state
40 to +85 and +125 C.
CC
Notes
1. C
2. The condition is V
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
QUICK REFERENCE DATA
GND = 0 V; T
t
C
C
C
SYMBOL
PHL
I
O
PD
P
f
f
C
V
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
i
o
/t
D
CC
PD
= input frequency in MHz;
L
PLH
= output frequency in MHz;
(C
= output load capacitance in pF;
= C
is used to determine the dynamic power dissipation (P
L
= supply voltage in Volts.
nOE
PD
V
H
L
L
propagation delay
nA to nY
input capacitance
output capacitance
power dissipation
capacitance
amb
CC
PARAMETER
V
2
CC
= 25 C; t
2
f
2
o
) = sum of outputs;
I
INPUT
= GND to V
f
i
+
r
= t
(C
f
L
C
V
V
C
f = 1 MHz;
notes 1 and 2
3.0 ns.
CC
V
CC
I
L
L
CONDITIONS
= V
CC
= 15 pF;
= 50 pF;
.
nA
74AHC125; 74AHCT125
= 5 V
H
X
L
2
CC
f
or GND
o
) where:
3.0
3.0
4.0
10
AHC
Product specification
TYPICAL
OUTPUT
3.0
3.0
4.0
12
AHCT
D
nY
H
L
Z
in W).
ns
pF
pF
pF
UNIT