ISD5216E WINBOND [Winbond], ISD5216E Datasheet - Page 26
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ISD5216E
Manufacturer Part Number
ISD5216E
Description
8 to 16 minutes voice record/playback device with integrated codec
Manufacturer
WINBOND [Winbond]
Datasheet
1.ISD5216E.pdf
(75 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISD5216EY
Manufacturer:
PANASONIC
Quantity:
45 000
The command sequence for an analog playback operation from a given address is the Slave Address
(80h), the Command Byte (A9h) for Play Analog @ Address, and the two address bytes. If The Play
Analog (A8h) is sent, playback starts from the current address pointer. The current address pointer is
returned when the three status bytes are read.
The command sequence for an Analog Record is a four byte sequence consisting of the Slave
Address (80h), the Command Byte (91h) for Record Analog @ Address, and the two address bytes. If
The Record Analog (90h) is sent, recording starts from the current address pointer.
Message cueing allows the user to skip through messages, without having to know the actual physical
location of each message. This operation is used during playback. In this mode, the messages are
skipped 512 times faster than in normal playback mode. This operation will stop when an EOM marker
is reached. Then, the internal address counter will be pointing to the next message.
The Digital Write function allows the user to select a portion of the array to be used as digital memory.
The partition between analog and digital memory is left up to the user. A page can only be either
Digital or Analog, but not both. The minimum addressable block of memory in the digital mode is 1
block, or 64 bits, when reading or writing. The address sent to the device is the 11-bit row (or page)
address with the 5-bit scan (or block) address. However, one must send a Digital Erase before
attempting to change digital data on a page. This means that even when changing only one of the 32
blocks, all 32 will need to be rewritten to the page.
After the address is entered, the data is sent in one-byte packets followed by an I
generated by the chip. Data for each block is sent MSB first. The data transfer is ended when the
master generates an I
condition, zero is “written” in the remaining bytes; that is, they are left at the erase level. An erased
page (row) will be read as all zeros. The device can buffer up to two blocks of data.
If the device is unable to accept more data due to the internal write process, the SCL line will be held
LOW indicating, to the master, to halt data transfer. If the device encounters an overflow condition, it
will respond by generating an interrupt condition and an I
valid byte of data. Once data transfer is terminated, the device needs up to two cycles (64 us) to
complete its internal write cycle before another command is sent. If an active command is sent before
the internal cycle is finished, the ISD5216 will hold SCL LOW until the current command is finished.
The Digital Read command utilizes the combined I
the chip using the write data direction. Then the data direction is reversed by sending a repeated start
condition and the slave address with R/W set to one. After this, the slave device (ISD5216) begins to
send data to the master until the master generates a Not Acknowledge. If the part encounters an
overflow condition, the INT pin is pulled LOW. No other communication with the master is possible
due to the master generating ACK signals.
7.6. DIGITAL MODE
7.5.8. Playback Mode
7.5.9. Record Mode
7.5.10. Message Cueing
7.6.1. Writing Data
7.6.2. Reading Data
2
C STOP condition. If only a partial block of data is sent before the STOP
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2
C command format. That is, a command is sent to
2
C Not Acknowledge signal after the last
2
C acknowledge
ISD5216